1405 lines
70 KiB
Plaintext
1405 lines
70 KiB
Plaintext
#! /c/Source/iverilog-install/bin/vvp
|
|
:ivl_version "12.0 (devel)" "(s20150603-1539-g2693dd32b)";
|
|
:ivl_delay_selection "TYPICAL";
|
|
:vpi_time_precision - 12;
|
|
:vpi_module "C:\PROGRA~1\iverilog\lib\ivl\system.vpi";
|
|
:vpi_module "C:\PROGRA~1\iverilog\lib\ivl\vhdl_sys.vpi";
|
|
:vpi_module "C:\PROGRA~1\iverilog\lib\ivl\vhdl_textio.vpi";
|
|
:vpi_module "C:\PROGRA~1\iverilog\lib\ivl\v2005_math.vpi";
|
|
:vpi_module "C:\PROGRA~1\iverilog\lib\ivl\va_math.vpi";
|
|
S_0000013b1992eb90 .scope module, "EzLogic_tb" "EzLogic_tb" 2 3;
|
|
.timescale -6 -7;
|
|
P_0000013b19874160 .param/str "FLAG_TO_TEST" 0 2 4, "0o";
|
|
P_0000013b19874198 .param/l "N" 0 2 5, +C4<00000000000000000000000000101010>;
|
|
v0000013b199ebcd0_0 .var "clk", 0 0;
|
|
v0000013b199ebc30_0 .var "counter", 6 0;
|
|
v0000013b199eb050_0 .var "counter2", 6 0;
|
|
v0000013b199eb5f0_0 .var "data_in", 7 0;
|
|
v0000013b199ea510_0 .net "data_out", 7 0, L_0000013b199ea790; 1 drivers
|
|
v0000013b199ec590_0 .var "data_out_all", 0 335;
|
|
L_0000013b199ef3c0 .functor BUFT 1, C4<001100000111100010011101010101101001001011110010111111100010001110111011001011000101110110011110000101100100000001100110010100111011011011001011001000010111110010010101001010011001100011001110000101111011011100010100001101111000100011011001010010011001010100100110100000001011010010111100111001001100001100001010100101101100011101010011>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ebb90_0 .net "data_std", 0 335, L_0000013b199ef3c0; 1 drivers
|
|
L_0000013b199eeb50 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150 .array "flag_test_arr", 41 0;
|
|
v0000013b199ea150_0 .net v0000013b199ea150 0, 7 0, L_0000013b199eeb50; 1 drivers
|
|
L_0000013b199eeb08 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_1 .net v0000013b199ea150 1, 7 0, L_0000013b199eeb08; 1 drivers
|
|
L_0000013b199eeac0 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_2 .net v0000013b199ea150 2, 7 0, L_0000013b199eeac0; 1 drivers
|
|
L_0000013b199eea78 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_3 .net v0000013b199ea150 3, 7 0, L_0000013b199eea78; 1 drivers
|
|
L_0000013b199eea30 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_4 .net v0000013b199ea150 4, 7 0, L_0000013b199eea30; 1 drivers
|
|
L_0000013b199ee9e8 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_5 .net v0000013b199ea150 5, 7 0, L_0000013b199ee9e8; 1 drivers
|
|
L_0000013b199ee9a0 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_6 .net v0000013b199ea150 6, 7 0, L_0000013b199ee9a0; 1 drivers
|
|
L_0000013b199ee958 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_7 .net v0000013b199ea150 7, 7 0, L_0000013b199ee958; 1 drivers
|
|
L_0000013b199ee910 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_8 .net v0000013b199ea150 8, 7 0, L_0000013b199ee910; 1 drivers
|
|
L_0000013b199ee8c8 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_9 .net v0000013b199ea150 9, 7 0, L_0000013b199ee8c8; 1 drivers
|
|
L_0000013b199ee880 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_10 .net v0000013b199ea150 10, 7 0, L_0000013b199ee880; 1 drivers
|
|
L_0000013b199ee838 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_11 .net v0000013b199ea150 11, 7 0, L_0000013b199ee838; 1 drivers
|
|
L_0000013b199ee7f0 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_12 .net v0000013b199ea150 12, 7 0, L_0000013b199ee7f0; 1 drivers
|
|
L_0000013b199ee7a8 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_13 .net v0000013b199ea150 13, 7 0, L_0000013b199ee7a8; 1 drivers
|
|
L_0000013b199ee760 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_14 .net v0000013b199ea150 14, 7 0, L_0000013b199ee760; 1 drivers
|
|
L_0000013b199ee718 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_15 .net v0000013b199ea150 15, 7 0, L_0000013b199ee718; 1 drivers
|
|
L_0000013b199ee6d0 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_16 .net v0000013b199ea150 16, 7 0, L_0000013b199ee6d0; 1 drivers
|
|
L_0000013b199ee688 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_17 .net v0000013b199ea150 17, 7 0, L_0000013b199ee688; 1 drivers
|
|
L_0000013b199ee640 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_18 .net v0000013b199ea150 18, 7 0, L_0000013b199ee640; 1 drivers
|
|
L_0000013b199ee5f8 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_19 .net v0000013b199ea150 19, 7 0, L_0000013b199ee5f8; 1 drivers
|
|
L_0000013b199ee5b0 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_20 .net v0000013b199ea150 20, 7 0, L_0000013b199ee5b0; 1 drivers
|
|
L_0000013b199ee568 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_21 .net v0000013b199ea150 21, 7 0, L_0000013b199ee568; 1 drivers
|
|
L_0000013b199ee520 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_22 .net v0000013b199ea150 22, 7 0, L_0000013b199ee520; 1 drivers
|
|
L_0000013b199ee4d8 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_23 .net v0000013b199ea150 23, 7 0, L_0000013b199ee4d8; 1 drivers
|
|
L_0000013b199ee490 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_24 .net v0000013b199ea150 24, 7 0, L_0000013b199ee490; 1 drivers
|
|
L_0000013b199ee448 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_25 .net v0000013b199ea150 25, 7 0, L_0000013b199ee448; 1 drivers
|
|
L_0000013b199ee400 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_26 .net v0000013b199ea150 26, 7 0, L_0000013b199ee400; 1 drivers
|
|
L_0000013b199ee3b8 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_27 .net v0000013b199ea150 27, 7 0, L_0000013b199ee3b8; 1 drivers
|
|
L_0000013b199ee370 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_28 .net v0000013b199ea150 28, 7 0, L_0000013b199ee370; 1 drivers
|
|
L_0000013b199ee328 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_29 .net v0000013b199ea150 29, 7 0, L_0000013b199ee328; 1 drivers
|
|
L_0000013b199ee2e0 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_30 .net v0000013b199ea150 30, 7 0, L_0000013b199ee2e0; 1 drivers
|
|
L_0000013b199ee298 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_31 .net v0000013b199ea150 31, 7 0, L_0000013b199ee298; 1 drivers
|
|
L_0000013b199ee250 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_32 .net v0000013b199ea150 32, 7 0, L_0000013b199ee250; 1 drivers
|
|
L_0000013b199ee208 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_33 .net v0000013b199ea150 33, 7 0, L_0000013b199ee208; 1 drivers
|
|
L_0000013b199ee1c0 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_34 .net v0000013b199ea150 34, 7 0, L_0000013b199ee1c0; 1 drivers
|
|
L_0000013b199ee178 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_35 .net v0000013b199ea150 35, 7 0, L_0000013b199ee178; 1 drivers
|
|
L_0000013b199ee130 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_36 .net v0000013b199ea150 36, 7 0, L_0000013b199ee130; 1 drivers
|
|
L_0000013b199ee0e8 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_37 .net v0000013b199ea150 37, 7 0, L_0000013b199ee0e8; 1 drivers
|
|
L_0000013b199ee0a0 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_38 .net v0000013b199ea150 38, 7 0, L_0000013b199ee0a0; 1 drivers
|
|
L_0000013b199ee058 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_39 .net v0000013b199ea150 39, 7 0, L_0000013b199ee058; 1 drivers
|
|
L_0000013b199ee010 .functor BUFT 1, C4<00110000>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_40 .net v0000013b199ea150 40, 7 0, L_0000013b199ee010; 1 drivers
|
|
L_0000013b199edfc8 .functor BUFT 1, C4<01101111>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199ea150_41 .net v0000013b199ea150 41, 7 0, L_0000013b199edfc8; 1 drivers
|
|
v0000013b199eab50_0 .var "rst_n", 0 0;
|
|
v0000013b199eb190_0 .var "start", 0 0;
|
|
v0000013b199ea0b0_0 .net "success", 0 0, L_0000013b19a37b80; 1 drivers
|
|
v0000013b199ea5b0_0 .var "valid_in", 0 0;
|
|
v0000013b199ec630_0 .net "valid_out", 0 0, L_0000013b19a3f590; 1 drivers
|
|
E_0000013b19923d20 .event posedge, v0000013b19929ea0_0;
|
|
E_0000013b199237a0 .event negedge, v0000013b199eb190_0;
|
|
L_0000013b19a37b80 .cmp/eq 336, L_0000013b199ef3c0, v0000013b199ec590_0;
|
|
S_0000013b199725e0 .scope generate, "genblk1[0]" "genblk1[0]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19924260 .param/l "i" 0 2 22, +C4<00>;
|
|
S_0000013b19973720 .scope generate, "genblk1[1]" "genblk1[1]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19923b60 .param/l "i" 0 2 22, +C4<01>;
|
|
S_0000013b198b18e0 .scope generate, "genblk1[2]" "genblk1[2]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19923820 .param/l "i" 0 2 22, +C4<010>;
|
|
S_0000013b198b1a70 .scope generate, "genblk1[3]" "genblk1[3]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19923ba0 .param/l "i" 0 2 22, +C4<011>;
|
|
S_0000013b198b0450 .scope generate, "genblk1[4]" "genblk1[4]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19923ce0 .param/l "i" 0 2 22, +C4<0100>;
|
|
S_0000013b198b05e0 .scope generate, "genblk1[5]" "genblk1[5]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b199240a0 .param/l "i" 0 2 22, +C4<0101>;
|
|
S_0000013b198aa6a0 .scope generate, "genblk1[6]" "genblk1[6]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19923920 .param/l "i" 0 2 22, +C4<0110>;
|
|
S_0000013b198aa830 .scope generate, "genblk1[7]" "genblk1[7]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b199239a0 .param/l "i" 0 2 22, +C4<0111>;
|
|
S_0000013b198a9210 .scope generate, "genblk1[8]" "genblk1[8]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19923d60 .param/l "i" 0 2 22, +C4<01000>;
|
|
S_0000013b198a93a0 .scope generate, "genblk1[9]" "genblk1[9]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b199242a0 .param/l "i" 0 2 22, +C4<01001>;
|
|
S_0000013b198a3d60 .scope generate, "genblk1[10]" "genblk1[10]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19924320 .param/l "i" 0 2 22, +C4<01010>;
|
|
S_0000013b198a3ef0 .scope generate, "genblk1[11]" "genblk1[11]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19924460 .param/l "i" 0 2 22, +C4<01011>;
|
|
S_0000013b198a3420 .scope generate, "genblk1[12]" "genblk1[12]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b199244e0 .param/l "i" 0 2 22, +C4<01100>;
|
|
S_0000013b198a35b0 .scope generate, "genblk1[13]" "genblk1[13]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19925420 .param/l "i" 0 2 22, +C4<01101>;
|
|
S_0000013b198a2ef0 .scope generate, "genblk1[14]" "genblk1[14]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19924fe0 .param/l "i" 0 2 22, +C4<01110>;
|
|
S_0000013b198a3080 .scope generate, "genblk1[15]" "genblk1[15]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19924e20 .param/l "i" 0 2 22, +C4<01111>;
|
|
S_0000013b199744e0 .scope generate, "genblk1[16]" "genblk1[16]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19925020 .param/l "i" 0 2 22, +C4<010000>;
|
|
S_0000013b19974b20 .scope generate, "genblk1[17]" "genblk1[17]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19924d20 .param/l "i" 0 2 22, +C4<010001>;
|
|
S_0000013b19974cb0 .scope generate, "genblk1[18]" "genblk1[18]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19924a60 .param/l "i" 0 2 22, +C4<010010>;
|
|
S_0000013b19974990 .scope generate, "genblk1[19]" "genblk1[19]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b199250e0 .param/l "i" 0 2 22, +C4<010011>;
|
|
S_0000013b19974030 .scope generate, "genblk1[20]" "genblk1[20]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19924ea0 .param/l "i" 0 2 22, +C4<010100>;
|
|
S_0000013b19973ea0 .scope generate, "genblk1[21]" "genblk1[21]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b199251e0 .param/l "i" 0 2 22, +C4<010101>;
|
|
S_0000013b199741c0 .scope generate, "genblk1[22]" "genblk1[22]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19925320 .param/l "i" 0 2 22, +C4<010110>;
|
|
S_0000013b19974670 .scope generate, "genblk1[23]" "genblk1[23]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19924e60 .param/l "i" 0 2 22, +C4<010111>;
|
|
S_0000013b19974350 .scope generate, "genblk1[24]" "genblk1[24]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19924be0 .param/l "i" 0 2 22, +C4<011000>;
|
|
S_0000013b19974800 .scope generate, "genblk1[25]" "genblk1[25]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19925120 .param/l "i" 0 2 22, +C4<011001>;
|
|
S_0000013b19975680 .scope generate, "genblk1[26]" "genblk1[26]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19924ae0 .param/l "i" 0 2 22, +C4<011010>;
|
|
S_0000013b199751d0 .scope generate, "genblk1[27]" "genblk1[27]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19924660 .param/l "i" 0 2 22, +C4<011011>;
|
|
S_0000013b19976170 .scope generate, "genblk1[28]" "genblk1[28]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19924b60 .param/l "i" 0 2 22, +C4<011100>;
|
|
S_0000013b199754f0 .scope generate, "genblk1[29]" "genblk1[29]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19924ba0 .param/l "i" 0 2 22, +C4<011101>;
|
|
S_0000013b19976490 .scope generate, "genblk1[30]" "genblk1[30]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19925260 .param/l "i" 0 2 22, +C4<011110>;
|
|
S_0000013b19975040 .scope generate, "genblk1[31]" "genblk1[31]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19925160 .param/l "i" 0 2 22, +C4<011111>;
|
|
S_0000013b19976620 .scope generate, "genblk1[32]" "genblk1[32]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b199245a0 .param/l "i" 0 2 22, +C4<0100000>;
|
|
S_0000013b19975cc0 .scope generate, "genblk1[33]" "genblk1[33]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19925520 .param/l "i" 0 2 22, +C4<0100001>;
|
|
S_0000013b19975fe0 .scope generate, "genblk1[34]" "genblk1[34]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19924ee0 .param/l "i" 0 2 22, +C4<0100010>;
|
|
S_0000013b19975e50 .scope generate, "genblk1[35]" "genblk1[35]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b199247e0 .param/l "i" 0 2 22, +C4<0100011>;
|
|
S_0000013b19976300 .scope generate, "genblk1[36]" "genblk1[36]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19924d60 .param/l "i" 0 2 22, +C4<0100100>;
|
|
S_0000013b199759a0 .scope generate, "genblk1[37]" "genblk1[37]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19925360 .param/l "i" 0 2 22, +C4<0100101>;
|
|
S_0000013b199767b0 .scope generate, "genblk1[38]" "genblk1[38]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19924f60 .param/l "i" 0 2 22, +C4<0100110>;
|
|
S_0000013b19976940 .scope generate, "genblk1[39]" "genblk1[39]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19924c60 .param/l "i" 0 2 22, +C4<0100111>;
|
|
S_0000013b19976ad0 .scope generate, "genblk1[40]" "genblk1[40]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b199252a0 .param/l "i" 0 2 22, +C4<0101000>;
|
|
S_0000013b19976c60 .scope generate, "genblk1[41]" "genblk1[41]" 2 22, 2 22 0, S_0000013b1992eb90;
|
|
.timescale -6 -7;
|
|
P_0000013b19924ca0 .param/l "i" 0 2 22, +C4<0101001>;
|
|
S_0000013b19974eb0 .scope module, "inst" "EzLogic_top" 2 27, 3 16 0, S_0000013b1992eb90;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst_n";
|
|
.port_info 2 /INPUT 8 "data_in";
|
|
.port_info 3 /INPUT 1 "valid_in";
|
|
.port_info 4 /OUTPUT 8 "data_out";
|
|
.port_info 5 /OUTPUT 1 "valid_out";
|
|
L_0000013b199eeb98 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199e9170_0 .net "<const0>", 0 0, L_0000013b199eeb98; 1 drivers
|
|
L_0000013b199eebe0 .functor BUFT 1, C4<1>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199e9990_0 .net "<const1>", 0 0, L_0000013b199eebe0; 1 drivers
|
|
v0000013b199e90d0_0 .net *"_ivl_115", 0 0, L_0000013b19a39ac0; 1 drivers
|
|
v0000013b199e9a30_0 .net *"_ivl_117", 0 0, L_0000013b19a39a20; 1 drivers
|
|
v0000013b199e8f90_0 .net *"_ivl_119", 0 0, L_0000013b19a39f20; 1 drivers
|
|
v0000013b199e8450_0 .net *"_ivl_121", 0 0, L_0000013b19a3a240; 1 drivers
|
|
v0000013b199e9030_0 .net *"_ivl_151", 0 0, L_0000013b19a39840; 1 drivers
|
|
v0000013b199e8130_0 .net *"_ivl_153", 0 0, L_0000013b19a3a600; 1 drivers
|
|
v0000013b199e9210_0 .net *"_ivl_155", 0 0, L_0000013b19a398e0; 1 drivers
|
|
v0000013b199e92b0_0 .net *"_ivl_160", 2 0, L_0000013b19a38800; 1 drivers
|
|
v0000013b199e93f0_0 .net "clk", 0 0, v0000013b199ebcd0_0; 1 drivers
|
|
v0000013b199e81d0_0 .net "clk_IBUF", 0 0, L_0000013b199164e0; 1 drivers
|
|
v0000013b199e9ad0_0 .net "clk_IBUF_BUFG", 0 0, L_0000013b19916b00; 1 drivers
|
|
v0000013b199e9b70_0 .net "data_in", 7 0, v0000013b199eb5f0_0; 1 drivers
|
|
v0000013b199e9c10_0 .net "data_in_IBUF", 7 0, L_0000013b199eb410; 1 drivers
|
|
v0000013b199e9df0_0 .net "data_out", 7 0, L_0000013b199ea790; alias, 1 drivers
|
|
v0000013b199e7ff0_0 .net "data_out_OBUF", 7 0, L_0000013b19a3a4c0; 1 drivers
|
|
v0000013b199ea010_0 .net "data_reg[3]_i_2_n_0", 0 0, L_0000013b199ec3b0; 1 drivers
|
|
v0000013b199ebe10_0 .net "data_reg[3]_i_3_n_0", 0 0, L_0000013b199eaf10; 1 drivers
|
|
v0000013b199eb870_0 .net "data_reg[3]_i_4_n_0", 0 0, L_0000013b199ec6d0; 1 drivers
|
|
v0000013b199eb7d0_0 .net "data_reg[3]_i_5_n_0", 0 0, L_0000013b199ed670; 1 drivers
|
|
v0000013b199ea470_0 .net "data_reg[7]_i_2_n_0", 0 0, L_0000013b199ed030; 1 drivers
|
|
v0000013b199eb910_0 .net "data_reg[7]_i_3_n_0", 0 0, L_0000013b199ed8f0; 1 drivers
|
|
v0000013b199eb370_0 .net "data_reg[7]_i_4_n_0", 0 0, L_0000013b199ecbd0; 1 drivers
|
|
v0000013b199eb2d0_0 .net "data_reg[7]_i_5_n_0", 0 0, L_0000013b199ed350; 1 drivers
|
|
v0000013b199eb9b0_0 .net "data_reg[7]_i_6_n_0", 0 0, L_0000013b199ed3f0; 1 drivers
|
|
v0000013b199ea970_0 .net "data_reg_reg[3]_i_1_n_0", 0 0, L_0000013b19a3a920; 1 drivers
|
|
v0000013b199ead30_0 .net "data_reg_reg[3]_i_1_n_1", 0 0, L_0000013b19a3a2e0; 1 drivers
|
|
v0000013b199ec090_0 .net "data_reg_reg[3]_i_1_n_2", 0 0, L_0000013b19a3a380; 1 drivers
|
|
v0000013b199eac90_0 .net "data_reg_reg[3]_i_1_n_3", 0 0, L_0000013b19a3a880; 1 drivers
|
|
v0000013b199eba50_0 .net "data_reg_reg[7]_i_1_n_1", 0 0, L_0000013b19a38b20; 1 drivers
|
|
v0000013b199ea650_0 .net "data_reg_reg[7]_i_1_n_2", 0 0, L_0000013b19a37400; 1 drivers
|
|
v0000013b199ebaf0_0 .net "data_reg_reg[7]_i_1_n_3", 0 0, L_0000013b19a38300; 1 drivers
|
|
v0000013b199eaa10_0 .net "p_0_in", 7 0, L_0000013b19a39520; 1 drivers
|
|
v0000013b199eabf0_0 .net "rst_n", 0 0, v0000013b199eab50_0; 1 drivers
|
|
v0000013b199eae70_0 .net "rst_n_IBUF", 0 0, L_0000013b19a3f8a0; 1 drivers
|
|
v0000013b199eb0f0_0 .net "valid_in", 0 0, v0000013b199ea5b0_0; 1 drivers
|
|
v0000013b199ec770_0 .net "valid_in_IBUF", 0 0, L_0000013b19a3f910; 1 drivers
|
|
v0000013b199ec4f0_0 .net "valid_out", 0 0, L_0000013b19a3f590; alias, 1 drivers
|
|
v0000013b199ea6f0_0 .net "valid_out_OBUF", 0 0, v0000013b199e98f0_0; 1 drivers
|
|
L_0000013b199ebd70 .part v0000013b199eb5f0_0, 0, 1;
|
|
L_0000013b199eb230 .part v0000013b199eb5f0_0, 1, 1;
|
|
L_0000013b199ebf50 .part v0000013b199eb5f0_0, 2, 1;
|
|
L_0000013b199eafb0 .part v0000013b199eb5f0_0, 3, 1;
|
|
L_0000013b199ec130 .part v0000013b199eb5f0_0, 4, 1;
|
|
L_0000013b199eadd0 .part v0000013b199eb5f0_0, 5, 1;
|
|
L_0000013b199ec1d0 .part v0000013b199eb5f0_0, 6, 1;
|
|
L_0000013b199ea1f0 .part v0000013b199eb5f0_0, 7, 1;
|
|
LS_0000013b199eb410_0_0 .concat8 [ 1 1 1 1], L_0000013b19916a90, L_0000013b19916da0, L_0000013b19916e10, L_0000013b199166a0;
|
|
LS_0000013b199eb410_0_4 .concat8 [ 1 1 1 1], L_0000013b19916780, L_0000013b19916c50, L_0000013b19916b70, L_0000013b19916be0;
|
|
L_0000013b199eb410 .concat8 [ 4 4 0 0], LS_0000013b199eb410_0_0, LS_0000013b199eb410_0_4;
|
|
L_0000013b199ebeb0 .part L_0000013b19a3a4c0, 0, 1;
|
|
L_0000013b199ebff0 .part L_0000013b19a3a4c0, 1, 1;
|
|
L_0000013b199ec270 .part L_0000013b19a3a4c0, 2, 1;
|
|
L_0000013b199ea3d0 .part L_0000013b19a3a4c0, 3, 1;
|
|
L_0000013b199ec310 .part L_0000013b19a3a4c0, 4, 1;
|
|
L_0000013b199eaab0 .part L_0000013b19a3a4c0, 5, 1;
|
|
L_0000013b199eb4b0 .part L_0000013b19a3a4c0, 6, 1;
|
|
L_0000013b199ea290 .part L_0000013b19a3a4c0, 7, 1;
|
|
LS_0000013b199ea790_0_0 .concat8 [ 1 1 1 1], L_0000013b199167f0, L_0000013b19a365d0, L_0000013b19a36d40, L_0000013b19a36170;
|
|
LS_0000013b199ea790_0_4 .concat8 [ 1 1 1 1], L_0000013b19a361e0, L_0000013b19a36090, L_0000013b19a36950, L_0000013b19a36640;
|
|
L_0000013b199ea790 .concat8 [ 4 4 0 0], LS_0000013b199ea790_0_0, LS_0000013b199ea790_0_4;
|
|
L_0000013b199ec450 .part L_0000013b19a3a4c0, 5, 1;
|
|
L_0000013b199ea330 .part L_0000013b199eb410, 3, 1;
|
|
L_0000013b199eb550 .part L_0000013b19a3a4c0, 6, 1;
|
|
L_0000013b199eb690 .part L_0000013b199eb410, 2, 1;
|
|
L_0000013b199ed2b0 .part L_0000013b19a3a4c0, 2, 1;
|
|
L_0000013b199ed530 .part L_0000013b199eb410, 1, 1;
|
|
L_0000013b199edc10 .part L_0000013b19a3a4c0, 4, 1;
|
|
L_0000013b199ed990 .part L_0000013b199eb410, 0, 1;
|
|
L_0000013b199ece50 .part L_0000013b19a3a4c0, 7, 1;
|
|
L_0000013b199eda30 .part L_0000013b199eb410, 7, 1;
|
|
L_0000013b199eca90 .part L_0000013b19a3a4c0, 0, 1;
|
|
L_0000013b199ec9f0 .part L_0000013b199eb410, 6, 1;
|
|
L_0000013b199ec8b0 .part L_0000013b19a3a4c0, 3, 1;
|
|
L_0000013b199ecf90 .part L_0000013b199eb410, 5, 1;
|
|
L_0000013b199edad0 .part L_0000013b19a3a4c0, 1, 1;
|
|
L_0000013b199ecb30 .part L_0000013b199eb410, 4, 1;
|
|
L_0000013b199ecdb0 .part L_0000013b19a39520, 0, 1;
|
|
L_0000013b199ede90 .part L_0000013b19a39520, 1, 1;
|
|
L_0000013b199edb70 .part L_0000013b19a39520, 2, 1;
|
|
L_0000013b199ed710 .part L_0000013b19a39520, 3, 1;
|
|
L_0000013b19a39ac0 .part L_0000013b19a3a4c0, 5, 1;
|
|
L_0000013b19a39a20 .part L_0000013b19a3a4c0, 6, 1;
|
|
L_0000013b19a39f20 .part L_0000013b19a3a4c0, 2, 1;
|
|
L_0000013b19a3a240 .part L_0000013b19a3a4c0, 4, 1;
|
|
L_0000013b19a39d40 .concat [ 1 1 1 1], L_0000013b19a3a240, L_0000013b19a39f20, L_0000013b19a39a20, L_0000013b19a39ac0;
|
|
L_0000013b19a3a420 .concat [ 1 1 1 1], L_0000013b199ed670, L_0000013b199ec6d0, L_0000013b199eaf10, L_0000013b199ec3b0;
|
|
L_0000013b19a3a920 .part L_0000013b19a3a7e0, 3, 1;
|
|
L_0000013b19a3a2e0 .part L_0000013b19a3a7e0, 2, 1;
|
|
L_0000013b19a3a380 .part L_0000013b19a3a7e0, 1, 1;
|
|
L_0000013b19a3a880 .part L_0000013b19a3a7e0, 0, 1;
|
|
L_0000013b19a3a560 .part L_0000013b19a39520, 4, 1;
|
|
L_0000013b19a39c00 .part L_0000013b19a39520, 5, 1;
|
|
L_0000013b19a3ab00 .part L_0000013b19a39520, 6, 1;
|
|
L_0000013b19a3a9c0 .part L_0000013b19a39520, 7, 1;
|
|
LS_0000013b19a3a4c0_0_0 .concat8 [ 1 1 1 1], v0000013b199e3c80_0, v0000013b199e2380_0, v0000013b199e36e0_0, v0000013b199e35a0_0;
|
|
LS_0000013b19a3a4c0_0_4 .concat8 [ 1 1 1 1], v0000013b199e5010_0, v0000013b199e4f70_0, v0000013b199e55b0_0, v0000013b199e5650_0;
|
|
L_0000013b19a3a4c0 .concat8 [ 4 4 0 0], LS_0000013b19a3a4c0_0_0, LS_0000013b19a3a4c0_0_4;
|
|
L_0000013b19a39840 .part L_0000013b19a3a4c0, 0, 1;
|
|
L_0000013b19a3a600 .part L_0000013b19a3a4c0, 3, 1;
|
|
L_0000013b19a398e0 .part L_0000013b19a3a4c0, 1, 1;
|
|
L_0000013b19a39980 .concat [ 1 1 1 1], L_0000013b19a398e0, L_0000013b19a3a600, L_0000013b19a39840, L_0000013b199eeb98;
|
|
L_0000013b19a37c20 .concat [ 1 1 1 1], L_0000013b199ed3f0, L_0000013b199ed350, L_0000013b199ecbd0, L_0000013b199ed8f0;
|
|
L_0000013b19a38b20 .part L_0000013b19a38800, 2, 1;
|
|
L_0000013b19a37400 .part L_0000013b19a38800, 1, 1;
|
|
L_0000013b19a38300 .part L_0000013b19a38800, 0, 1;
|
|
L_0000013b19a38800 .part L_0000013b19a3ae20, 0, 3;
|
|
L_0000013b19a39520 .concat8 [ 4 4 0 0], L_0000013b19a36870, L_0000013b19a3f520;
|
|
S_0000013b19975360 .scope module, "GND" "GND" 3 63, 4 13 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /OUTPUT 1 "G";
|
|
v0000013b19929c20_0 .net "G", 0 0, L_0000013b199eeb98; alias, 1 drivers
|
|
S_0000013b19975810 .scope module, "VCC" "VCC" 3 65, 5 13 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /OUTPUT 1 "P";
|
|
v0000013b199288c0_0 .net "P", 0 0, L_0000013b199eebe0; alias, 1 drivers
|
|
S_0000013b19975b30 .scope module, "clk_IBUF_BUFG_inst" "BUFG" 3 67, 6 13 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I";
|
|
.port_info 1 /OUTPUT 1 "O";
|
|
L_0000013b19916b00 .functor BUFZ 1, L_0000013b199164e0, C4<0>, C4<0>, C4<0>;
|
|
v0000013b19928f00_0 .net "I", 0 0, L_0000013b199164e0; alias, 1 drivers
|
|
v0000013b1992a260_0 .net "O", 0 0, L_0000013b19916b00; alias, 1 drivers
|
|
S_0000013b199d8750 .scope module, "clk_IBUF_inst" "IBUF" 3 70, 7 1 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I";
|
|
.port_info 1 /OUTPUT 1 "O";
|
|
L_0000013b199164e0 .functor BUFZ 1, v0000013b199ebcd0_0, C4<0>, C4<0>, C4<0>;
|
|
v0000013b19929ea0_0 .net "I", 0 0, v0000013b199ebcd0_0; alias, 1 drivers
|
|
v0000013b19928e60_0 .net "O", 0 0, L_0000013b199164e0; alias, 1 drivers
|
|
S_0000013b199d9560 .scope module, "data_in_IBUF[0]_inst" "IBUF" 3 73, 7 1 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I";
|
|
.port_info 1 /OUTPUT 1 "O";
|
|
L_0000013b19916a90 .functor BUFZ 1, L_0000013b199ebd70, C4<0>, C4<0>, C4<0>;
|
|
v0000013b19929f40_0 .net "I", 0 0, L_0000013b199ebd70; 1 drivers
|
|
v0000013b1992a300_0 .net "O", 0 0, L_0000013b19916a90; 1 drivers
|
|
S_0000013b199d8430 .scope module, "data_in_IBUF[1]_inst" "IBUF" 3 76, 7 1 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I";
|
|
.port_info 1 /OUTPUT 1 "O";
|
|
L_0000013b19916da0 .functor BUFZ 1, L_0000013b199eb230, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199299a0_0 .net "I", 0 0, L_0000013b199eb230; 1 drivers
|
|
v0000013b19928fa0_0 .net "O", 0 0, L_0000013b19916da0; 1 drivers
|
|
S_0000013b199d8110 .scope module, "data_in_IBUF[2]_inst" "IBUF" 3 79, 7 1 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I";
|
|
.port_info 1 /OUTPUT 1 "O";
|
|
L_0000013b19916e10 .functor BUFZ 1, L_0000013b199ebf50, C4<0>, C4<0>, C4<0>;
|
|
v0000013b19929540_0 .net "I", 0 0, L_0000013b199ebf50; 1 drivers
|
|
v0000013b19928dc0_0 .net "O", 0 0, L_0000013b19916e10; 1 drivers
|
|
S_0000013b199d88e0 .scope module, "data_in_IBUF[3]_inst" "IBUF" 3 82, 7 1 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I";
|
|
.port_info 1 /OUTPUT 1 "O";
|
|
L_0000013b199166a0 .functor BUFZ 1, L_0000013b199eafb0, C4<0>, C4<0>, C4<0>;
|
|
v0000013b19929400_0 .net "I", 0 0, L_0000013b199eafb0; 1 drivers
|
|
v0000013b1992a120_0 .net "O", 0 0, L_0000013b199166a0; 1 drivers
|
|
S_0000013b199d8c00 .scope module, "data_in_IBUF[4]_inst" "IBUF" 3 85, 7 1 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I";
|
|
.port_info 1 /OUTPUT 1 "O";
|
|
L_0000013b19916780 .functor BUFZ 1, L_0000013b199ec130, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199286e0_0 .net "I", 0 0, L_0000013b199ec130; 1 drivers
|
|
v0000013b1992a1c0_0 .net "O", 0 0, L_0000013b19916780; 1 drivers
|
|
S_0000013b199d9880 .scope module, "data_in_IBUF[5]_inst" "IBUF" 3 88, 7 1 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I";
|
|
.port_info 1 /OUTPUT 1 "O";
|
|
L_0000013b19916c50 .functor BUFZ 1, L_0000013b199eadd0, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199295e0_0 .net "I", 0 0, L_0000013b199eadd0; 1 drivers
|
|
v0000013b19929220_0 .net "O", 0 0, L_0000013b19916c50; 1 drivers
|
|
S_0000013b199d8d90 .scope module, "data_in_IBUF[6]_inst" "IBUF" 3 91, 7 1 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I";
|
|
.port_info 1 /OUTPUT 1 "O";
|
|
L_0000013b19916b70 .functor BUFZ 1, L_0000013b199ec1d0, C4<0>, C4<0>, C4<0>;
|
|
v0000013b19928960_0 .net "I", 0 0, L_0000013b199ec1d0; 1 drivers
|
|
v0000013b19929fe0_0 .net "O", 0 0, L_0000013b19916b70; 1 drivers
|
|
S_0000013b199d9a10 .scope module, "data_in_IBUF[7]_inst" "IBUF" 3 94, 7 1 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I";
|
|
.port_info 1 /OUTPUT 1 "O";
|
|
L_0000013b19916be0 .functor BUFZ 1, L_0000013b199ea1f0, C4<0>, C4<0>, C4<0>;
|
|
v0000013b19929d60_0 .net "I", 0 0, L_0000013b199ea1f0; 1 drivers
|
|
v0000013b19928b40_0 .net "O", 0 0, L_0000013b19916be0; 1 drivers
|
|
S_0000013b199d8f20 .scope module, "data_out_OBUF[0]_inst" "OBUF" 3 97, 8 1 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I";
|
|
.port_info 1 /OUTPUT 1 "O";
|
|
L_0000013b199167f0 .functor BUFZ 1, L_0000013b199ebeb0, C4<0>, C4<0>, C4<0>;
|
|
v0000013b1992a440_0 .net "I", 0 0, L_0000013b199ebeb0; 1 drivers
|
|
v0000013b19929180_0 .net "O", 0 0, L_0000013b199167f0; 1 drivers
|
|
S_0000013b199d90b0 .scope module, "data_out_OBUF[1]_inst" "OBUF" 3 100, 8 1 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I";
|
|
.port_info 1 /OUTPUT 1 "O";
|
|
L_0000013b19a365d0 .functor BUFZ 1, L_0000013b199ebff0, C4<0>, C4<0>, C4<0>;
|
|
v0000013b19929900_0 .net "I", 0 0, L_0000013b199ebff0; 1 drivers
|
|
v0000013b19929720_0 .net "O", 0 0, L_0000013b19a365d0; 1 drivers
|
|
S_0000013b199d85c0 .scope module, "data_out_OBUF[2]_inst" "OBUF" 3 103, 8 1 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I";
|
|
.port_info 1 /OUTPUT 1 "O";
|
|
L_0000013b19a36d40 .functor BUFZ 1, L_0000013b199ec270, C4<0>, C4<0>, C4<0>;
|
|
v0000013b1992a3a0_0 .net "I", 0 0, L_0000013b199ec270; 1 drivers
|
|
v0000013b19929e00_0 .net "O", 0 0, L_0000013b19a36d40; 1 drivers
|
|
S_0000013b199d9240 .scope module, "data_out_OBUF[3]_inst" "OBUF" 3 106, 8 1 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I";
|
|
.port_info 1 /OUTPUT 1 "O";
|
|
L_0000013b19a36170 .functor BUFZ 1, L_0000013b199ea3d0, C4<0>, C4<0>, C4<0>;
|
|
v0000013b19929040_0 .net "I", 0 0, L_0000013b199ea3d0; 1 drivers
|
|
v0000013b19929860_0 .net "O", 0 0, L_0000013b19a36170; 1 drivers
|
|
S_0000013b199d9d30 .scope module, "data_out_OBUF[4]_inst" "OBUF" 3 109, 8 1 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I";
|
|
.port_info 1 /OUTPUT 1 "O";
|
|
L_0000013b19a361e0 .functor BUFZ 1, L_0000013b199ec310, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199292c0_0 .net "I", 0 0, L_0000013b199ec310; 1 drivers
|
|
v0000013b1992a080_0 .net "O", 0 0, L_0000013b19a361e0; 1 drivers
|
|
S_0000013b199d8a70 .scope module, "data_out_OBUF[5]_inst" "OBUF" 3 111, 8 1 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I";
|
|
.port_info 1 /OUTPUT 1 "O";
|
|
L_0000013b19a36090 .functor BUFZ 1, L_0000013b199eaab0, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199285a0_0 .net "I", 0 0, L_0000013b199eaab0; 1 drivers
|
|
v0000013b19928640_0 .net "O", 0 0, L_0000013b19a36090; 1 drivers
|
|
S_0000013b199d9ba0 .scope module, "data_out_OBUF[6]_inst" "OBUF" 3 114, 8 1 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I";
|
|
.port_info 1 /OUTPUT 1 "O";
|
|
L_0000013b19a36950 .functor BUFZ 1, L_0000013b199eb4b0, C4<0>, C4<0>, C4<0>;
|
|
v0000013b19928be0_0 .net "I", 0 0, L_0000013b199eb4b0; 1 drivers
|
|
v0000013b19915250_0 .net "O", 0 0, L_0000013b19a36950; 1 drivers
|
|
S_0000013b199d93d0 .scope module, "data_out_OBUF[7]_inst" "OBUF" 3 117, 8 1 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I";
|
|
.port_info 1 /OUTPUT 1 "O";
|
|
L_0000013b19a36640 .functor BUFZ 1, L_0000013b199ea290, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199dac10_0 .net "I", 0 0, L_0000013b199ea290; 1 drivers
|
|
v0000013b199dab70_0 .net "O", 0 0, L_0000013b19a36640; 1 drivers
|
|
S_0000013b199d96f0 .scope module, "data_reg[3]_i_2" "LUT2" 3 122, 9 13 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I0";
|
|
.port_info 1 /INPUT 1 "I1";
|
|
.port_info 2 /OUTPUT 1 "O";
|
|
P_0000013b19924ce0 .param/l "INIT" 0 9 15, C4<0110>;
|
|
v0000013b199da850_0 .net "I0", 0 0, L_0000013b199ec450; 1 drivers
|
|
v0000013b199db430_0 .net "I1", 0 0, L_0000013b199ea330; 1 drivers
|
|
v0000013b199da210_0 .net "O", 0 0, L_0000013b199ec3b0; alias, 1 drivers
|
|
L_0000013b199eec28 .functor BUFT 1, C4<0110>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199dadf0_0 .net/2u *"_ivl_2", 3 0, L_0000013b199eec28; 1 drivers
|
|
v0000013b199da670_0 .net "_w_idx", 1 0, L_0000013b199ea8d0; 1 drivers
|
|
L_0000013b199ea8d0 .concat [ 1 1 0 0], L_0000013b199ec450, L_0000013b199ea330;
|
|
L_0000013b199ec3b0 .part/v L_0000013b199eec28, L_0000013b199ea8d0, 1;
|
|
S_0000013b199d7f80 .scope module, "data_reg[3]_i_3" "LUT2" 3 128, 9 13 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I0";
|
|
.port_info 1 /INPUT 1 "I1";
|
|
.port_info 2 /OUTPUT 1 "O";
|
|
P_0000013b19924820 .param/l "INIT" 0 9 15, C4<0110>;
|
|
v0000013b199db4d0_0 .net "I0", 0 0, L_0000013b199eb550; 1 drivers
|
|
v0000013b199daad0_0 .net "I1", 0 0, L_0000013b199eb690; 1 drivers
|
|
v0000013b199db750_0 .net "O", 0 0, L_0000013b199eaf10; alias, 1 drivers
|
|
L_0000013b199eec70 .functor BUFT 1, C4<0110>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199db9d0_0 .net/2u *"_ivl_2", 3 0, L_0000013b199eec70; 1 drivers
|
|
v0000013b199db6b0_0 .net "_w_idx", 1 0, L_0000013b199ea830; 1 drivers
|
|
L_0000013b199ea830 .concat [ 1 1 0 0], L_0000013b199eb550, L_0000013b199eb690;
|
|
L_0000013b199eaf10 .part/v L_0000013b199eec70, L_0000013b199ea830, 1;
|
|
S_0000013b199d82a0 .scope module, "data_reg[3]_i_4" "LUT2" 3 134, 9 13 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I0";
|
|
.port_info 1 /INPUT 1 "I1";
|
|
.port_info 2 /OUTPUT 1 "O";
|
|
P_0000013b19925460 .param/l "INIT" 0 9 15, C4<0110>;
|
|
v0000013b199da490_0 .net "I0", 0 0, L_0000013b199ed2b0; 1 drivers
|
|
v0000013b199dacb0_0 .net "I1", 0 0, L_0000013b199ed530; 1 drivers
|
|
v0000013b199dae90_0 .net "O", 0 0, L_0000013b199ec6d0; alias, 1 drivers
|
|
L_0000013b199eecb8 .functor BUFT 1, C4<0110>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199dbc50_0 .net/2u *"_ivl_2", 3 0, L_0000013b199eecb8; 1 drivers
|
|
v0000013b199db390_0 .net "_w_idx", 1 0, L_0000013b199eb730; 1 drivers
|
|
L_0000013b199eb730 .concat [ 1 1 0 0], L_0000013b199ed2b0, L_0000013b199ed530;
|
|
L_0000013b199ec6d0 .part/v L_0000013b199eecb8, L_0000013b199eb730, 1;
|
|
S_0000013b199dffb0 .scope module, "data_reg[3]_i_5" "LUT2" 3 140, 9 13 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I0";
|
|
.port_info 1 /INPUT 1 "I1";
|
|
.port_info 2 /OUTPUT 1 "O";
|
|
P_0000013b19924da0 .param/l "INIT" 0 9 15, C4<0110>;
|
|
v0000013b199da2b0_0 .net "I0", 0 0, L_0000013b199edc10; 1 drivers
|
|
v0000013b199da350_0 .net "I1", 0 0, L_0000013b199ed990; 1 drivers
|
|
v0000013b199db570_0 .net "O", 0 0, L_0000013b199ed670; alias, 1 drivers
|
|
L_0000013b199eed00 .functor BUFT 1, C4<0110>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199da710_0 .net/2u *"_ivl_2", 3 0, L_0000013b199eed00; 1 drivers
|
|
v0000013b199db890_0 .net "_w_idx", 1 0, L_0000013b199edd50; 1 drivers
|
|
L_0000013b199edd50 .concat [ 1 1 0 0], L_0000013b199edc10, L_0000013b199ed990;
|
|
L_0000013b199ed670 .part/v L_0000013b199eed00, L_0000013b199edd50, 1;
|
|
S_0000013b199e1bd0 .scope module, "data_reg[7]_i_2" "LUT1" 3 146, 10 13 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I0";
|
|
.port_info 1 /OUTPUT 1 "O";
|
|
P_0000013b19924620 .param/l "INIT" 0 10 15, C4<01>;
|
|
v0000013b199db610_0 .net "I0", 0 0, L_0000013b19a3f8a0; alias, 1 drivers
|
|
v0000013b199db1b0_0 .net "O", 0 0, L_0000013b199ed030; alias, 1 drivers
|
|
L_0000013b199eed48 .functor BUFT 1, C4<01>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199dad50_0 .net/2u *"_ivl_0", 1 0, L_0000013b199eed48; 1 drivers
|
|
L_0000013b199ed030 .part/v L_0000013b199eed48, L_0000013b19a3f8a0, 1;
|
|
S_0000013b199e1a40 .scope module, "data_reg[7]_i_3" "LUT2" 3 151, 9 13 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I0";
|
|
.port_info 1 /INPUT 1 "I1";
|
|
.port_info 2 /OUTPUT 1 "O";
|
|
P_0000013b199246a0 .param/l "INIT" 0 9 15, C4<0110>;
|
|
v0000013b199db250_0 .net "I0", 0 0, L_0000013b199ece50; 1 drivers
|
|
v0000013b199da3f0_0 .net "I1", 0 0, L_0000013b199eda30; 1 drivers
|
|
v0000013b199db7f0_0 .net "O", 0 0, L_0000013b199ed8f0; alias, 1 drivers
|
|
L_0000013b199eed90 .functor BUFT 1, C4<0110>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199db110_0 .net/2u *"_ivl_2", 3 0, L_0000013b199eed90; 1 drivers
|
|
v0000013b199db930_0 .net "_w_idx", 1 0, L_0000013b199ed170; 1 drivers
|
|
L_0000013b199ed170 .concat [ 1 1 0 0], L_0000013b199ece50, L_0000013b199eda30;
|
|
L_0000013b199ed8f0 .part/v L_0000013b199eed90, L_0000013b199ed170, 1;
|
|
S_0000013b199e10e0 .scope module, "data_reg[7]_i_4" "LUT2" 3 157, 9 13 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I0";
|
|
.port_info 1 /INPUT 1 "I1";
|
|
.port_info 2 /OUTPUT 1 "O";
|
|
P_0000013b199248e0 .param/l "INIT" 0 9 15, C4<0110>;
|
|
v0000013b199da530_0 .net "I0", 0 0, L_0000013b199eca90; 1 drivers
|
|
v0000013b199daf30_0 .net "I1", 0 0, L_0000013b199ec9f0; 1 drivers
|
|
v0000013b199dbb10_0 .net "O", 0 0, L_0000013b199ecbd0; alias, 1 drivers
|
|
L_0000013b199eedd8 .functor BUFT 1, C4<0110>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199da5d0_0 .net/2u *"_ivl_2", 3 0, L_0000013b199eedd8; 1 drivers
|
|
v0000013b199dafd0_0 .net "_w_idx", 1 0, L_0000013b199ed5d0; 1 drivers
|
|
L_0000013b199ed5d0 .concat [ 1 1 0 0], L_0000013b199eca90, L_0000013b199ec9f0;
|
|
L_0000013b199ecbd0 .part/v L_0000013b199eedd8, L_0000013b199ed5d0, 1;
|
|
S_0000013b199e0c30 .scope module, "data_reg[7]_i_5" "LUT2" 3 163, 9 13 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I0";
|
|
.port_info 1 /INPUT 1 "I1";
|
|
.port_info 2 /OUTPUT 1 "O";
|
|
P_0000013b19924760 .param/l "INIT" 0 9 15, C4<0110>;
|
|
v0000013b199dba70_0 .net "I0", 0 0, L_0000013b199ec8b0; 1 drivers
|
|
v0000013b199da7b0_0 .net "I1", 0 0, L_0000013b199ecf90; 1 drivers
|
|
v0000013b199da990_0 .net "O", 0 0, L_0000013b199ed350; alias, 1 drivers
|
|
L_0000013b199eee20 .functor BUFT 1, C4<0110>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199db2f0_0 .net/2u *"_ivl_2", 3 0, L_0000013b199eee20; 1 drivers
|
|
v0000013b199daa30_0 .net "_w_idx", 1 0, L_0000013b199eddf0; 1 drivers
|
|
L_0000013b199eddf0 .concat [ 1 1 0 0], L_0000013b199ec8b0, L_0000013b199ecf90;
|
|
L_0000013b199ed350 .part/v L_0000013b199eee20, L_0000013b199eddf0, 1;
|
|
S_0000013b199e0dc0 .scope module, "data_reg[7]_i_6" "LUT2" 3 169, 9 13 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I0";
|
|
.port_info 1 /INPUT 1 "I1";
|
|
.port_info 2 /OUTPUT 1 "O";
|
|
P_0000013b199246e0 .param/l "INIT" 0 9 15, C4<0110>;
|
|
v0000013b199dbbb0_0 .net "I0", 0 0, L_0000013b199edad0; 1 drivers
|
|
v0000013b199da8f0_0 .net "I1", 0 0, L_0000013b199ecb30; 1 drivers
|
|
v0000013b199dbcf0_0 .net "O", 0 0, L_0000013b199ed3f0; alias, 1 drivers
|
|
L_0000013b199eee68 .functor BUFT 1, C4<0110>, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199db070_0 .net/2u *"_ivl_2", 3 0, L_0000013b199eee68; 1 drivers
|
|
v0000013b199da0d0_0 .net "_w_idx", 1 0, L_0000013b199ed210; 1 drivers
|
|
L_0000013b199ed210 .concat [ 1 1 0 0], L_0000013b199edad0, L_0000013b199ecb30;
|
|
L_0000013b199ed3f0 .part/v L_0000013b199eee68, L_0000013b199ed210, 1;
|
|
S_0000013b199e0910 .scope module, "data_reg_reg[0]" "FDCE" 3 175, 11 13 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "C";
|
|
.port_info 1 /INPUT 1 "CE";
|
|
.port_info 2 /INPUT 1 "CLR";
|
|
.port_info 3 /INPUT 1 "D";
|
|
.port_info 4 /OUTPUT 1 "Q";
|
|
P_0000013b199738b0 .param/l "INIT" 0 11 18, C4<0>;
|
|
P_0000013b199738e8 .param/l "IS_CLR_INVERTED" 0 11 17, C4<0>;
|
|
P_0000013b19973920 .param/l "IS_C_INVERTED" 0 11 15, C4<0>;
|
|
P_0000013b19973958 .param/l "IS_D_INVERTED" 0 11 16, C4<0>;
|
|
L_0000013b199eeeb0 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
|
|
L_0000013b19a36a30 .functor XOR 1, L_0000013b199ed030, L_0000013b199eeeb0, C4<0>, C4<0>;
|
|
L_0000013b199eeef8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
|
|
L_0000013b19a36c60 .functor XOR 1, L_0000013b199ecdb0, L_0000013b199eeef8, C4<0>, C4<0>;
|
|
v0000013b199dbd90_0 .net "C", 0 0, L_0000013b19916b00; alias, 1 drivers
|
|
v0000013b199dbe30_0 .net "CE", 0 0, L_0000013b19a3f910; alias, 1 drivers
|
|
v0000013b199d9f90_0 .net "CLR", 0 0, L_0000013b199ed030; alias, 1 drivers
|
|
v0000013b199da030_0 .net "D", 0 0, L_0000013b199ecdb0; 1 drivers
|
|
v0000013b199da170_0 .net "Q", 0 0, v0000013b199e3c80_0; 1 drivers
|
|
v0000013b199e2f60_0 .net/2u *"_ivl_0", 0 0, L_0000013b199eeeb0; 1 drivers
|
|
v0000013b199e3000_0 .net/2u *"_ivl_4", 0 0, L_0000013b199eeef8; 1 drivers
|
|
v0000013b199e3c80_0 .var "_r_Q", 0 0;
|
|
v0000013b199e33c0_0 .net "_w_CLR", 0 0, L_0000013b19a36a30; 1 drivers
|
|
v0000013b199e22e0_0 .net "_w_D", 0 0, L_0000013b19a36c60; 1 drivers
|
|
S_0000013b199e1270 .scope generate, "GEN_CLK_POS" "GEN_CLK_POS" 11 42, 11 42 0, S_0000013b199e0910;
|
|
.timescale -12 -12;
|
|
E_0000013b19924720 .event posedge, v0000013b199e33c0_0, v0000013b1992a260_0;
|
|
S_0000013b199e05f0 .scope begin, "INIT_STATE" "INIT_STATE" 11 37, 11 37 0, S_0000013b199e0910;
|
|
.timescale -12 -12;
|
|
S_0000013b199e0f50 .scope module, "data_reg_reg[1]" "FDCE" 3 183, 11 13 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "C";
|
|
.port_info 1 /INPUT 1 "CE";
|
|
.port_info 2 /INPUT 1 "CLR";
|
|
.port_info 3 /INPUT 1 "D";
|
|
.port_info 4 /OUTPUT 1 "Q";
|
|
P_0000013b198a3210 .param/l "INIT" 0 11 18, C4<0>;
|
|
P_0000013b198a3248 .param/l "IS_CLR_INVERTED" 0 11 17, C4<0>;
|
|
P_0000013b198a3280 .param/l "IS_C_INVERTED" 0 11 15, C4<0>;
|
|
P_0000013b198a32b8 .param/l "IS_D_INVERTED" 0 11 16, C4<0>;
|
|
L_0000013b199eef40 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
|
|
L_0000013b19a36cd0 .functor XOR 1, L_0000013b199ed030, L_0000013b199eef40, C4<0>, C4<0>;
|
|
L_0000013b199eef88 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
|
|
L_0000013b19a366b0 .functor XOR 1, L_0000013b199ede90, L_0000013b199eef88, C4<0>, C4<0>;
|
|
v0000013b199e3460_0 .net "C", 0 0, L_0000013b19916b00; alias, 1 drivers
|
|
v0000013b199e2600_0 .net "CE", 0 0, L_0000013b19a3f910; alias, 1 drivers
|
|
v0000013b199e2100_0 .net "CLR", 0 0, L_0000013b199ed030; alias, 1 drivers
|
|
v0000013b199e3a00_0 .net "D", 0 0, L_0000013b199ede90; 1 drivers
|
|
v0000013b199e26a0_0 .net "Q", 0 0, v0000013b199e2380_0; 1 drivers
|
|
v0000013b199e2ba0_0 .net/2u *"_ivl_0", 0 0, L_0000013b199eef40; 1 drivers
|
|
v0000013b199e2420_0 .net/2u *"_ivl_4", 0 0, L_0000013b199eef88; 1 drivers
|
|
v0000013b199e2380_0 .var "_r_Q", 0 0;
|
|
v0000013b199e24c0_0 .net "_w_CLR", 0 0, L_0000013b19a36cd0; 1 drivers
|
|
v0000013b199e2740_0 .net "_w_D", 0 0, L_0000013b19a366b0; 1 drivers
|
|
S_0000013b199e1400 .scope generate, "GEN_CLK_POS" "GEN_CLK_POS" 11 42, 11 42 0, S_0000013b199e0f50;
|
|
.timescale -12 -12;
|
|
E_0000013b199247a0 .event posedge, v0000013b199e24c0_0, v0000013b1992a260_0;
|
|
S_0000013b199e18b0 .scope begin, "INIT_STATE" "INIT_STATE" 11 37, 11 37 0, S_0000013b199e0f50;
|
|
.timescale -12 -12;
|
|
S_0000013b199e0aa0 .scope module, "data_reg_reg[2]" "FDCE" 3 191, 11 13 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "C";
|
|
.port_info 1 /INPUT 1 "CE";
|
|
.port_info 2 /INPUT 1 "CLR";
|
|
.port_info 3 /INPUT 1 "D";
|
|
.port_info 4 /OUTPUT 1 "Q";
|
|
P_0000013b198a3740 .param/l "INIT" 0 11 18, C4<0>;
|
|
P_0000013b198a3778 .param/l "IS_CLR_INVERTED" 0 11 17, C4<0>;
|
|
P_0000013b198a37b0 .param/l "IS_C_INVERTED" 0 11 15, C4<0>;
|
|
P_0000013b198a37e8 .param/l "IS_D_INVERTED" 0 11 16, C4<0>;
|
|
L_0000013b199eefd0 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
|
|
L_0000013b19a36480 .functor XOR 1, L_0000013b199ed030, L_0000013b199eefd0, C4<0>, C4<0>;
|
|
L_0000013b199ef018 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
|
|
L_0000013b19a369c0 .functor XOR 1, L_0000013b199edb70, L_0000013b199ef018, C4<0>, C4<0>;
|
|
v0000013b199e3d20_0 .net "C", 0 0, L_0000013b19916b00; alias, 1 drivers
|
|
v0000013b199e2560_0 .net "CE", 0 0, L_0000013b19a3f910; alias, 1 drivers
|
|
v0000013b199e2ec0_0 .net "CLR", 0 0, L_0000013b199ed030; alias, 1 drivers
|
|
v0000013b199e2e20_0 .net "D", 0 0, L_0000013b199edb70; 1 drivers
|
|
v0000013b199e31e0_0 .net "Q", 0 0, v0000013b199e36e0_0; 1 drivers
|
|
v0000013b199e3dc0_0 .net/2u *"_ivl_0", 0 0, L_0000013b199eefd0; 1 drivers
|
|
v0000013b199e38c0_0 .net/2u *"_ivl_4", 0 0, L_0000013b199ef018; 1 drivers
|
|
v0000013b199e36e0_0 .var "_r_Q", 0 0;
|
|
v0000013b199e2a60_0 .net "_w_CLR", 0 0, L_0000013b19a36480; 1 drivers
|
|
v0000013b199e3320_0 .net "_w_D", 0 0, L_0000013b19a369c0; 1 drivers
|
|
S_0000013b199e1590 .scope generate, "GEN_CLK_POS" "GEN_CLK_POS" 11 42, 11 42 0, S_0000013b199e0aa0;
|
|
.timescale -12 -12;
|
|
E_0000013b19924860 .event posedge, v0000013b199e2a60_0, v0000013b1992a260_0;
|
|
S_0000013b199e1720 .scope begin, "INIT_STATE" "INIT_STATE" 11 37, 11 37 0, S_0000013b199e0aa0;
|
|
.timescale -12 -12;
|
|
S_0000013b199e1d60 .scope module, "data_reg_reg[3]" "FDCE" 3 199, 11 13 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "C";
|
|
.port_info 1 /INPUT 1 "CE";
|
|
.port_info 2 /INPUT 1 "CLR";
|
|
.port_info 3 /INPUT 1 "D";
|
|
.port_info 4 /OUTPUT 1 "Q";
|
|
P_0000013b198a4080 .param/l "INIT" 0 11 18, C4<0>;
|
|
P_0000013b198a40b8 .param/l "IS_CLR_INVERTED" 0 11 17, C4<0>;
|
|
P_0000013b198a40f0 .param/l "IS_C_INVERTED" 0 11 15, C4<0>;
|
|
P_0000013b198a4128 .param/l "IS_D_INVERTED" 0 11 16, C4<0>;
|
|
L_0000013b199ef060 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
|
|
L_0000013b19a36250 .functor XOR 1, L_0000013b199ed030, L_0000013b199ef060, C4<0>, C4<0>;
|
|
L_0000013b199ef0a8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
|
|
L_0000013b19a36aa0 .functor XOR 1, L_0000013b199ed710, L_0000013b199ef0a8, C4<0>, C4<0>;
|
|
v0000013b199e3500_0 .net "C", 0 0, L_0000013b19916b00; alias, 1 drivers
|
|
v0000013b199e2ce0_0 .net "CE", 0 0, L_0000013b19a3f910; alias, 1 drivers
|
|
v0000013b199e3e60_0 .net "CLR", 0 0, L_0000013b199ed030; alias, 1 drivers
|
|
v0000013b199e2060_0 .net "D", 0 0, L_0000013b199ed710; 1 drivers
|
|
v0000013b199e3640_0 .net "Q", 0 0, v0000013b199e35a0_0; 1 drivers
|
|
v0000013b199e2880_0 .net/2u *"_ivl_0", 0 0, L_0000013b199ef060; 1 drivers
|
|
v0000013b199e1fc0_0 .net/2u *"_ivl_4", 0 0, L_0000013b199ef0a8; 1 drivers
|
|
v0000013b199e35a0_0 .var "_r_Q", 0 0;
|
|
v0000013b199e3780_0 .net "_w_CLR", 0 0, L_0000013b19a36250; 1 drivers
|
|
v0000013b199e30a0_0 .net "_w_D", 0 0, L_0000013b19a36aa0; 1 drivers
|
|
S_0000013b199e0460 .scope generate, "GEN_CLK_POS" "GEN_CLK_POS" 11 42, 11 42 0, S_0000013b199e1d60;
|
|
.timescale -12 -12;
|
|
E_0000013b199248a0 .event posedge, v0000013b199e3780_0, v0000013b1992a260_0;
|
|
S_0000013b199e0140 .scope begin, "INIT_STATE" "INIT_STATE" 11 37, 11 37 0, S_0000013b199e1d60;
|
|
.timescale -12 -12;
|
|
S_0000013b199e02d0 .scope module, "data_reg_reg[3]_i_1" "CARRY4" 3 206, 12 13 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "CI";
|
|
.port_info 1 /INPUT 1 "CYINIT";
|
|
.port_info 2 /INPUT 4 "DI";
|
|
.port_info 3 /INPUT 4 "S";
|
|
.port_info 4 /OUTPUT 4 "CO";
|
|
.port_info 5 /OUTPUT 4 "O";
|
|
L_0000013b19a36e90 .functor OR 1, L_0000013b199eeb98, L_0000013b199eeb98, C4<0>, C4<0>;
|
|
L_0000013b19a36800 .functor OR 1, L_0000013b199eeb98, L_0000013b199eeb98, C4<0>, C4<0>;
|
|
L_0000013b19a36870 .functor XOR 4, L_0000013b19a3a420, L_0000013b19a3a100, C4<0000>, C4<0000>;
|
|
v0000013b199e3140_0 .net "CI", 0 0, L_0000013b199eeb98; alias, 1 drivers
|
|
v0000013b199e21a0_0 .net "CO", 3 0, L_0000013b19a3a7e0; 1 drivers
|
|
v0000013b199e3280_0 .net "CYINIT", 0 0, L_0000013b199eeb98; alias, 1 drivers
|
|
v0000013b199e2240_0 .net "DI", 3 0, L_0000013b19a39d40; 1 drivers
|
|
v0000013b199e2c40_0 .net "O", 3 0, L_0000013b19a36870; 1 drivers
|
|
v0000013b199e3820_0 .net "S", 3 0, L_0000013b19a3a420; 1 drivers
|
|
v0000013b199e3be0_0 .net *"_ivl_1", 0 0, L_0000013b199ec950; 1 drivers
|
|
v0000013b199e3960_0 .net *"_ivl_11", 0 0, L_0000013b199edcb0; 1 drivers
|
|
v0000013b199e3aa0_0 .net *"_ivl_15", 0 0, L_0000013b199ec810; 1 drivers
|
|
v0000013b199e27e0_0 .net *"_ivl_17", 0 0, L_0000013b199ed850; 1 drivers
|
|
v0000013b199e3b40_0 .net *"_ivl_2", 0 0, L_0000013b19a36e90; 1 drivers
|
|
v0000013b199e2920_0 .net *"_ivl_21", 0 0, L_0000013b199ed0d0; 1 drivers
|
|
v0000013b199e29c0_0 .net *"_ivl_23", 0 0, L_0000013b19a39b60; 1 drivers
|
|
v0000013b199e2d80_0 .net *"_ivl_28", 0 0, L_0000013b19a36800; 1 drivers
|
|
v0000013b199e2b00_0 .net *"_ivl_30", 3 0, L_0000013b19a3a100; 1 drivers
|
|
v0000013b199e5dd0_0 .net *"_ivl_5", 0 0, L_0000013b199ecd10; 1 drivers
|
|
v0000013b199e46b0_0 .net *"_ivl_9", 0 0, L_0000013b199ed7b0; 1 drivers
|
|
v0000013b199e58d0_0 .net "_w_CO0", 0 0, L_0000013b199ed490; 1 drivers
|
|
v0000013b199e4430_0 .net "_w_CO1", 0 0, L_0000013b199ecc70; 1 drivers
|
|
v0000013b199e56f0_0 .net "_w_CO2", 0 0, L_0000013b199ecef0; 1 drivers
|
|
v0000013b199e5970_0 .net "_w_CO3", 0 0, L_0000013b19a3a1a0; 1 drivers
|
|
L_0000013b199ec950 .part L_0000013b19a3a420, 0, 1;
|
|
L_0000013b199ecd10 .part L_0000013b19a39d40, 0, 1;
|
|
L_0000013b199ed490 .functor MUXZ 1, L_0000013b199ecd10, L_0000013b19a36e90, L_0000013b199ec950, C4<>;
|
|
L_0000013b199ed7b0 .part L_0000013b19a3a420, 1, 1;
|
|
L_0000013b199edcb0 .part L_0000013b19a39d40, 1, 1;
|
|
L_0000013b199ecc70 .functor MUXZ 1, L_0000013b199edcb0, L_0000013b199ed490, L_0000013b199ed7b0, C4<>;
|
|
L_0000013b199ec810 .part L_0000013b19a3a420, 2, 1;
|
|
L_0000013b199ed850 .part L_0000013b19a39d40, 2, 1;
|
|
L_0000013b199ecef0 .functor MUXZ 1, L_0000013b199ed850, L_0000013b199ecc70, L_0000013b199ec810, C4<>;
|
|
L_0000013b199ed0d0 .part L_0000013b19a3a420, 3, 1;
|
|
L_0000013b19a39b60 .part L_0000013b19a39d40, 3, 1;
|
|
L_0000013b19a3a1a0 .functor MUXZ 1, L_0000013b19a39b60, L_0000013b199ecef0, L_0000013b199ed0d0, C4<>;
|
|
L_0000013b19a3a7e0 .concat [ 1 1 1 1], L_0000013b199ed490, L_0000013b199ecc70, L_0000013b199ecef0, L_0000013b19a3a1a0;
|
|
L_0000013b19a3a100 .concat [ 1 1 1 1], L_0000013b19a36800, L_0000013b199ed490, L_0000013b199ecc70, L_0000013b199ecef0;
|
|
S_0000013b199e0780 .scope module, "data_reg_reg[4]" "FDCE" 3 215, 11 13 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "C";
|
|
.port_info 1 /INPUT 1 "CE";
|
|
.port_info 2 /INPUT 1 "CLR";
|
|
.port_info 3 /INPUT 1 "D";
|
|
.port_info 4 /OUTPUT 1 "Q";
|
|
P_0000013b198a9530 .param/l "INIT" 0 11 18, C4<0>;
|
|
P_0000013b198a9568 .param/l "IS_CLR_INVERTED" 0 11 17, C4<0>;
|
|
P_0000013b198a95a0 .param/l "IS_C_INVERTED" 0 11 15, C4<0>;
|
|
P_0000013b198a95d8 .param/l "IS_D_INVERTED" 0 11 16, C4<0>;
|
|
L_0000013b199ef0f0 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
|
|
L_0000013b19a36560 .functor XOR 1, L_0000013b199ed030, L_0000013b199ef0f0, C4<0>, C4<0>;
|
|
L_0000013b199ef138 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
|
|
L_0000013b19a36f00 .functor XOR 1, L_0000013b19a3a560, L_0000013b199ef138, C4<0>, C4<0>;
|
|
v0000013b199e4890_0 .net "C", 0 0, L_0000013b19916b00; alias, 1 drivers
|
|
v0000013b199e5d30_0 .net "CE", 0 0, L_0000013b19a3f910; alias, 1 drivers
|
|
v0000013b199e5330_0 .net "CLR", 0 0, L_0000013b199ed030; alias, 1 drivers
|
|
v0000013b199e4ed0_0 .net "D", 0 0, L_0000013b19a3a560; 1 drivers
|
|
v0000013b199e4e30_0 .net "Q", 0 0, v0000013b199e5010_0; 1 drivers
|
|
v0000013b199e4750_0 .net/2u *"_ivl_0", 0 0, L_0000013b199ef0f0; 1 drivers
|
|
v0000013b199e49d0_0 .net/2u *"_ivl_4", 0 0, L_0000013b199ef138; 1 drivers
|
|
v0000013b199e5010_0 .var "_r_Q", 0 0;
|
|
v0000013b199e5790_0 .net "_w_CLR", 0 0, L_0000013b19a36560; 1 drivers
|
|
v0000013b199e44d0_0 .net "_w_D", 0 0, L_0000013b19a36f00; 1 drivers
|
|
S_0000013b199e75c0 .scope generate, "GEN_CLK_POS" "GEN_CLK_POS" 11 42, 11 42 0, S_0000013b199e0780;
|
|
.timescale -12 -12;
|
|
E_0000013b19924920 .event posedge, v0000013b199e5790_0, v0000013b1992a260_0;
|
|
S_0000013b199e6170 .scope begin, "INIT_STATE" "INIT_STATE" 11 37, 11 37 0, S_0000013b199e0780;
|
|
.timescale -12 -12;
|
|
S_0000013b199e6ad0 .scope module, "data_reg_reg[5]" "FDCE" 3 223, 11 13 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "C";
|
|
.port_info 1 /INPUT 1 "CE";
|
|
.port_info 2 /INPUT 1 "CLR";
|
|
.port_info 3 /INPUT 1 "D";
|
|
.port_info 4 /OUTPUT 1 "Q";
|
|
P_0000013b198aa9c0 .param/l "INIT" 0 11 18, C4<0>;
|
|
P_0000013b198aa9f8 .param/l "IS_CLR_INVERTED" 0 11 17, C4<0>;
|
|
P_0000013b198aaa30 .param/l "IS_C_INVERTED" 0 11 15, C4<0>;
|
|
P_0000013b198aaa68 .param/l "IS_D_INVERTED" 0 11 16, C4<0>;
|
|
L_0000013b199ef180 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
|
|
L_0000013b19a36100 .functor XOR 1, L_0000013b199ed030, L_0000013b199ef180, C4<0>, C4<0>;
|
|
L_0000013b199ef1c8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
|
|
L_0000013b19a36b10 .functor XOR 1, L_0000013b19a39c00, L_0000013b199ef1c8, C4<0>, C4<0>;
|
|
v0000013b199e53d0_0 .net "C", 0 0, L_0000013b19916b00; alias, 1 drivers
|
|
v0000013b199e5510_0 .net "CE", 0 0, L_0000013b19a3f910; alias, 1 drivers
|
|
v0000013b199e4b10_0 .net "CLR", 0 0, L_0000013b199ed030; alias, 1 drivers
|
|
v0000013b199e4390_0 .net "D", 0 0, L_0000013b19a39c00; 1 drivers
|
|
v0000013b199e42f0_0 .net "Q", 0 0, v0000013b199e4f70_0; 1 drivers
|
|
v0000013b199e5e70_0 .net/2u *"_ivl_0", 0 0, L_0000013b199ef180; 1 drivers
|
|
v0000013b199e4570_0 .net/2u *"_ivl_4", 0 0, L_0000013b199ef1c8; 1 drivers
|
|
v0000013b199e4f70_0 .var "_r_Q", 0 0;
|
|
v0000013b199e51f0_0 .net "_w_CLR", 0 0, L_0000013b19a36100; 1 drivers
|
|
v0000013b199e4110_0 .net "_w_D", 0 0, L_0000013b19a36b10; 1 drivers
|
|
S_0000013b199e7110 .scope generate, "GEN_CLK_POS" "GEN_CLK_POS" 11 42, 11 42 0, S_0000013b199e6ad0;
|
|
.timescale -12 -12;
|
|
E_0000013b19925e60 .event posedge, v0000013b199e51f0_0, v0000013b1992a260_0;
|
|
S_0000013b199e6300 .scope begin, "INIT_STATE" "INIT_STATE" 11 37, 11 37 0, S_0000013b199e6ad0;
|
|
.timescale -12 -12;
|
|
S_0000013b199e6490 .scope module, "data_reg_reg[6]" "FDCE" 3 231, 11 13 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "C";
|
|
.port_info 1 /INPUT 1 "CE";
|
|
.port_info 2 /INPUT 1 "CLR";
|
|
.port_info 3 /INPUT 1 "D";
|
|
.port_info 4 /OUTPUT 1 "Q";
|
|
P_0000013b198b0770 .param/l "INIT" 0 11 18, C4<0>;
|
|
P_0000013b198b07a8 .param/l "IS_CLR_INVERTED" 0 11 17, C4<0>;
|
|
P_0000013b198b07e0 .param/l "IS_C_INVERTED" 0 11 15, C4<0>;
|
|
P_0000013b198b0818 .param/l "IS_D_INVERTED" 0 11 16, C4<0>;
|
|
L_0000013b199ef210 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
|
|
L_0000013b19a36bf0 .functor XOR 1, L_0000013b199ed030, L_0000013b199ef210, C4<0>, C4<0>;
|
|
L_0000013b199ef258 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
|
|
L_0000013b19a36410 .functor XOR 1, L_0000013b19a3ab00, L_0000013b199ef258, C4<0>, C4<0>;
|
|
v0000013b199e4610_0 .net "C", 0 0, L_0000013b19916b00; alias, 1 drivers
|
|
v0000013b199e5a10_0 .net "CE", 0 0, L_0000013b19a3f910; alias, 1 drivers
|
|
v0000013b199e3fd0_0 .net "CLR", 0 0, L_0000013b199ed030; alias, 1 drivers
|
|
v0000013b199e5290_0 .net "D", 0 0, L_0000013b19a3ab00; 1 drivers
|
|
v0000013b199e50b0_0 .net "Q", 0 0, v0000013b199e55b0_0; 1 drivers
|
|
v0000013b199e47f0_0 .net/2u *"_ivl_0", 0 0, L_0000013b199ef210; 1 drivers
|
|
v0000013b199e5ab0_0 .net/2u *"_ivl_4", 0 0, L_0000013b199ef258; 1 drivers
|
|
v0000013b199e55b0_0 .var "_r_Q", 0 0;
|
|
v0000013b199e4070_0 .net "_w_CLR", 0 0, L_0000013b19a36bf0; 1 drivers
|
|
v0000013b199e4930_0 .net "_w_D", 0 0, L_0000013b19a36410; 1 drivers
|
|
S_0000013b199e7c00 .scope generate, "GEN_CLK_POS" "GEN_CLK_POS" 11 42, 11 42 0, S_0000013b199e6490;
|
|
.timescale -12 -12;
|
|
E_0000013b19925820 .event posedge, v0000013b199e4070_0, v0000013b1992a260_0;
|
|
S_0000013b199e5fe0 .scope begin, "INIT_STATE" "INIT_STATE" 11 37, 11 37 0, S_0000013b199e6490;
|
|
.timescale -12 -12;
|
|
S_0000013b199e7a70 .scope module, "data_reg_reg[7]" "FDCE" 3 239, 11 13 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "C";
|
|
.port_info 1 /INPUT 1 "CE";
|
|
.port_info 2 /INPUT 1 "CLR";
|
|
.port_info 3 /INPUT 1 "D";
|
|
.port_info 4 /OUTPUT 1 "Q";
|
|
P_0000013b198b1c00 .param/l "INIT" 0 11 18, C4<0>;
|
|
P_0000013b198b1c38 .param/l "IS_CLR_INVERTED" 0 11 17, C4<0>;
|
|
P_0000013b198b1c70 .param/l "IS_C_INVERTED" 0 11 15, C4<0>;
|
|
P_0000013b198b1ca8 .param/l "IS_D_INVERTED" 0 11 16, C4<0>;
|
|
L_0000013b199ef2a0 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
|
|
L_0000013b19a36020 .functor XOR 1, L_0000013b199ed030, L_0000013b199ef2a0, C4<0>, C4<0>;
|
|
L_0000013b199ef2e8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
|
|
L_0000013b19a362c0 .functor XOR 1, L_0000013b19a3a9c0, L_0000013b199ef2e8, C4<0>, C4<0>;
|
|
v0000013b199e4d90_0 .net "C", 0 0, L_0000013b19916b00; alias, 1 drivers
|
|
v0000013b199e4a70_0 .net "CE", 0 0, L_0000013b19a3f910; alias, 1 drivers
|
|
v0000013b199e41b0_0 .net "CLR", 0 0, L_0000013b199ed030; alias, 1 drivers
|
|
v0000013b199e5150_0 .net "D", 0 0, L_0000013b19a3a9c0; 1 drivers
|
|
v0000013b199e4250_0 .net "Q", 0 0, v0000013b199e5650_0; 1 drivers
|
|
v0000013b199e5470_0 .net/2u *"_ivl_0", 0 0, L_0000013b199ef2a0; 1 drivers
|
|
v0000013b199e5830_0 .net/2u *"_ivl_4", 0 0, L_0000013b199ef2e8; 1 drivers
|
|
v0000013b199e5650_0 .var "_r_Q", 0 0;
|
|
v0000013b199e4bb0_0 .net "_w_CLR", 0 0, L_0000013b19a36020; 1 drivers
|
|
v0000013b199e5b50_0 .net "_w_D", 0 0, L_0000013b19a362c0; 1 drivers
|
|
S_0000013b199e6620 .scope generate, "GEN_CLK_POS" "GEN_CLK_POS" 11 42, 11 42 0, S_0000013b199e7a70;
|
|
.timescale -12 -12;
|
|
E_0000013b19925a20 .event posedge, v0000013b199e4bb0_0, v0000013b1992a260_0;
|
|
S_0000013b199e7750 .scope begin, "INIT_STATE" "INIT_STATE" 11 37, 11 37 0, S_0000013b199e7a70;
|
|
.timescale -12 -12;
|
|
S_0000013b199e7430 .scope module, "data_reg_reg[7]_i_1" "CARRY4" 3 246, 12 13 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "CI";
|
|
.port_info 1 /INPUT 1 "CYINIT";
|
|
.port_info 2 /INPUT 4 "DI";
|
|
.port_info 3 /INPUT 4 "S";
|
|
.port_info 4 /OUTPUT 4 "CO";
|
|
.port_info 5 /OUTPUT 4 "O";
|
|
L_0000013b19a363a0 .functor OR 1, L_0000013b19a3a920, L_0000013b199eeb98, C4<0>, C4<0>;
|
|
L_0000013b19a3f830 .functor OR 1, L_0000013b19a3a920, L_0000013b199eeb98, C4<0>, C4<0>;
|
|
L_0000013b19a3f520 .functor XOR 4, L_0000013b19a37c20, L_0000013b19a3a060, C4<0000>, C4<0000>;
|
|
v0000013b199e5bf0_0 .net "CI", 0 0, L_0000013b19a3a920; alias, 1 drivers
|
|
v0000013b199e5c90_0 .net "CO", 3 0, L_0000013b19a3ae20; 1 drivers
|
|
v0000013b199e4c50_0 .net "CYINIT", 0 0, L_0000013b199eeb98; alias, 1 drivers
|
|
v0000013b199e4cf0_0 .net "DI", 3 0, L_0000013b19a39980; 1 drivers
|
|
v0000013b199e8630_0 .net "O", 3 0, L_0000013b19a3f520; 1 drivers
|
|
v0000013b199e8270_0 .net "S", 3 0, L_0000013b19a37c20; 1 drivers
|
|
v0000013b199e88b0_0 .net *"_ivl_1", 0 0, L_0000013b19a3a740; 1 drivers
|
|
v0000013b199e9490_0 .net *"_ivl_11", 0 0, L_0000013b19a3ac40; 1 drivers
|
|
v0000013b199e8310_0 .net *"_ivl_15", 0 0, L_0000013b19a3aec0; 1 drivers
|
|
v0000013b199e8bd0_0 .net *"_ivl_17", 0 0, L_0000013b19a3aba0; 1 drivers
|
|
v0000013b199e8770_0 .net *"_ivl_2", 0 0, L_0000013b19a363a0; 1 drivers
|
|
v0000013b199e9530_0 .net *"_ivl_21", 0 0, L_0000013b19a39e80; 1 drivers
|
|
v0000013b199e8950_0 .net *"_ivl_23", 0 0, L_0000013b19a39fc0; 1 drivers
|
|
v0000013b199e8a90_0 .net *"_ivl_28", 0 0, L_0000013b19a3f830; 1 drivers
|
|
v0000013b199e9350_0 .net *"_ivl_30", 3 0, L_0000013b19a3a060; 1 drivers
|
|
v0000013b199e97b0_0 .net *"_ivl_5", 0 0, L_0000013b19a39ca0; 1 drivers
|
|
v0000013b199e8b30_0 .net *"_ivl_9", 0 0, L_0000013b19a3a6a0; 1 drivers
|
|
v0000013b199e9850_0 .net "_w_CO0", 0 0, L_0000013b19a39de0; 1 drivers
|
|
v0000013b199e9cb0_0 .net "_w_CO1", 0 0, L_0000013b19a3aa60; 1 drivers
|
|
v0000013b199e84f0_0 .net "_w_CO2", 0 0, L_0000013b19a3ace0; 1 drivers
|
|
v0000013b199e9710_0 .net "_w_CO3", 0 0, L_0000013b19a3ad80; 1 drivers
|
|
L_0000013b19a3a740 .part L_0000013b19a37c20, 0, 1;
|
|
L_0000013b19a39ca0 .part L_0000013b19a39980, 0, 1;
|
|
L_0000013b19a39de0 .functor MUXZ 1, L_0000013b19a39ca0, L_0000013b19a363a0, L_0000013b19a3a740, C4<>;
|
|
L_0000013b19a3a6a0 .part L_0000013b19a37c20, 1, 1;
|
|
L_0000013b19a3ac40 .part L_0000013b19a39980, 1, 1;
|
|
L_0000013b19a3aa60 .functor MUXZ 1, L_0000013b19a3ac40, L_0000013b19a39de0, L_0000013b19a3a6a0, C4<>;
|
|
L_0000013b19a3aec0 .part L_0000013b19a37c20, 2, 1;
|
|
L_0000013b19a3aba0 .part L_0000013b19a39980, 2, 1;
|
|
L_0000013b19a3ace0 .functor MUXZ 1, L_0000013b19a3aba0, L_0000013b19a3aa60, L_0000013b19a3aec0, C4<>;
|
|
L_0000013b19a39e80 .part L_0000013b19a37c20, 3, 1;
|
|
L_0000013b19a39fc0 .part L_0000013b19a39980, 3, 1;
|
|
L_0000013b19a3ad80 .functor MUXZ 1, L_0000013b19a39fc0, L_0000013b19a3ace0, L_0000013b19a39e80, C4<>;
|
|
L_0000013b19a3ae20 .concat [ 1 1 1 1], L_0000013b19a39de0, L_0000013b19a3aa60, L_0000013b19a3ace0, L_0000013b19a3ad80;
|
|
L_0000013b19a3a060 .concat [ 1 1 1 1], L_0000013b19a3f830, L_0000013b19a39de0, L_0000013b19a3aa60, L_0000013b19a3ace0;
|
|
S_0000013b199e78e0 .scope module, "rst_n_IBUF_inst" "IBUF" 3 253, 7 1 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I";
|
|
.port_info 1 /OUTPUT 1 "O";
|
|
L_0000013b19a3f8a0 .functor BUFZ 1, v0000013b199eab50_0, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199e8c70_0 .net "I", 0 0, v0000013b199eab50_0; alias, 1 drivers
|
|
v0000013b199e8590_0 .net "O", 0 0, L_0000013b19a3f8a0; alias, 1 drivers
|
|
S_0000013b199e7d90 .scope module, "valid_in_IBUF_inst" "IBUF" 3 256, 7 1 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I";
|
|
.port_info 1 /OUTPUT 1 "O";
|
|
L_0000013b19a3f910 .functor BUFZ 1, v0000013b199ea5b0_0, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199e9e90_0 .net "I", 0 0, v0000013b199ea5b0_0; alias, 1 drivers
|
|
v0000013b199e83b0_0 .net "O", 0 0, L_0000013b19a3f910; alias, 1 drivers
|
|
S_0000013b199e67b0 .scope module, "valid_out_OBUF_inst" "OBUF" 3 259, 8 1 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "I";
|
|
.port_info 1 /OUTPUT 1 "O";
|
|
L_0000013b19a3f590 .functor BUFZ 1, v0000013b199e98f0_0, C4<0>, C4<0>, C4<0>;
|
|
v0000013b199e89f0_0 .net "I", 0 0, v0000013b199e98f0_0; alias, 1 drivers
|
|
v0000013b199e8d10_0 .net "O", 0 0, L_0000013b19a3f590; alias, 1 drivers
|
|
S_0000013b199e6c60 .scope module, "valid_out_reg" "FDCE" 3 264, 11 13 0, S_0000013b19974eb0;
|
|
.timescale -12 -12;
|
|
.port_info 0 /INPUT 1 "C";
|
|
.port_info 1 /INPUT 1 "CE";
|
|
.port_info 2 /INPUT 1 "CLR";
|
|
.port_info 3 /INPUT 1 "D";
|
|
.port_info 4 /OUTPUT 1 "Q";
|
|
P_0000013b199729c0 .param/l "INIT" 0 11 18, C4<0>;
|
|
P_0000013b199729f8 .param/l "IS_CLR_INVERTED" 0 11 17, C4<0>;
|
|
P_0000013b19972a30 .param/l "IS_C_INVERTED" 0 11 15, C4<0>;
|
|
P_0000013b19972a68 .param/l "IS_D_INVERTED" 0 11 16, C4<0>;
|
|
L_0000013b199ef330 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
|
|
L_0000013b19a3fad0 .functor XOR 1, L_0000013b199ed030, L_0000013b199ef330, C4<0>, C4<0>;
|
|
L_0000013b199ef378 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
|
|
L_0000013b19a3f130 .functor XOR 1, L_0000013b19a3f910, L_0000013b199ef378, C4<0>, C4<0>;
|
|
v0000013b199e95d0_0 .net "C", 0 0, L_0000013b19916b00; alias, 1 drivers
|
|
v0000013b199e8db0_0 .net "CE", 0 0, L_0000013b199eebe0; alias, 1 drivers
|
|
v0000013b199e8e50_0 .net "CLR", 0 0, L_0000013b199ed030; alias, 1 drivers
|
|
v0000013b199e8090_0 .net "D", 0 0, L_0000013b19a3f910; alias, 1 drivers
|
|
v0000013b199e9670_0 .net "Q", 0 0, v0000013b199e98f0_0; alias, 1 drivers
|
|
v0000013b199e9d50_0 .net/2u *"_ivl_0", 0 0, L_0000013b199ef330; 1 drivers
|
|
v0000013b199e8ef0_0 .net/2u *"_ivl_4", 0 0, L_0000013b199ef378; 1 drivers
|
|
v0000013b199e98f0_0 .var "_r_Q", 0 0;
|
|
v0000013b199e86d0_0 .net "_w_CLR", 0 0, L_0000013b19a3fad0; 1 drivers
|
|
v0000013b199e8810_0 .net "_w_D", 0 0, L_0000013b19a3f130; 1 drivers
|
|
S_0000013b199e6df0 .scope generate, "GEN_CLK_POS" "GEN_CLK_POS" 11 42, 11 42 0, S_0000013b199e6c60;
|
|
.timescale -12 -12;
|
|
E_0000013b19925620 .event posedge, v0000013b199e86d0_0, v0000013b1992a260_0;
|
|
S_0000013b199e6f80 .scope begin, "INIT_STATE" "INIT_STATE" 11 37, 11 37 0, S_0000013b199e6c60;
|
|
.timescale -12 -12;
|
|
.scope S_0000013b199e1270;
|
|
T_0 ;
|
|
%wait E_0000013b19924720;
|
|
%load/vec4 v0000013b199e33c0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_0.0, 8;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0000013b199e3c80_0, 0;
|
|
%jmp T_0.1;
|
|
T_0.0 ;
|
|
%load/vec4 v0000013b199dbe30_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_0.2, 8;
|
|
%load/vec4 v0000013b199e22e0_0;
|
|
%assign/vec4 v0000013b199e3c80_0, 0;
|
|
T_0.2 ;
|
|
T_0.1 ;
|
|
%jmp T_0;
|
|
.thread T_0;
|
|
.scope S_0000013b199e0910;
|
|
T_1 ;
|
|
%fork t_1, S_0000013b199e05f0;
|
|
%jmp t_0;
|
|
.scope S_0000013b199e05f0;
|
|
t_1 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0000013b199e3c80_0, 0, 1;
|
|
%end;
|
|
.scope S_0000013b199e0910;
|
|
t_0 %join;
|
|
%end;
|
|
.thread T_1;
|
|
.scope S_0000013b199e1400;
|
|
T_2 ;
|
|
%wait E_0000013b199247a0;
|
|
%load/vec4 v0000013b199e24c0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_2.0, 8;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0000013b199e2380_0, 0;
|
|
%jmp T_2.1;
|
|
T_2.0 ;
|
|
%load/vec4 v0000013b199e2600_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_2.2, 8;
|
|
%load/vec4 v0000013b199e2740_0;
|
|
%assign/vec4 v0000013b199e2380_0, 0;
|
|
T_2.2 ;
|
|
T_2.1 ;
|
|
%jmp T_2;
|
|
.thread T_2;
|
|
.scope S_0000013b199e0f50;
|
|
T_3 ;
|
|
%fork t_3, S_0000013b199e18b0;
|
|
%jmp t_2;
|
|
.scope S_0000013b199e18b0;
|
|
t_3 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0000013b199e2380_0, 0, 1;
|
|
%end;
|
|
.scope S_0000013b199e0f50;
|
|
t_2 %join;
|
|
%end;
|
|
.thread T_3;
|
|
.scope S_0000013b199e1590;
|
|
T_4 ;
|
|
%wait E_0000013b19924860;
|
|
%load/vec4 v0000013b199e2a60_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_4.0, 8;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0000013b199e36e0_0, 0;
|
|
%jmp T_4.1;
|
|
T_4.0 ;
|
|
%load/vec4 v0000013b199e2560_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_4.2, 8;
|
|
%load/vec4 v0000013b199e3320_0;
|
|
%assign/vec4 v0000013b199e36e0_0, 0;
|
|
T_4.2 ;
|
|
T_4.1 ;
|
|
%jmp T_4;
|
|
.thread T_4;
|
|
.scope S_0000013b199e0aa0;
|
|
T_5 ;
|
|
%fork t_5, S_0000013b199e1720;
|
|
%jmp t_4;
|
|
.scope S_0000013b199e1720;
|
|
t_5 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0000013b199e36e0_0, 0, 1;
|
|
%end;
|
|
.scope S_0000013b199e0aa0;
|
|
t_4 %join;
|
|
%end;
|
|
.thread T_5;
|
|
.scope S_0000013b199e0460;
|
|
T_6 ;
|
|
%wait E_0000013b199248a0;
|
|
%load/vec4 v0000013b199e3780_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_6.0, 8;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0000013b199e35a0_0, 0;
|
|
%jmp T_6.1;
|
|
T_6.0 ;
|
|
%load/vec4 v0000013b199e2ce0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_6.2, 8;
|
|
%load/vec4 v0000013b199e30a0_0;
|
|
%assign/vec4 v0000013b199e35a0_0, 0;
|
|
T_6.2 ;
|
|
T_6.1 ;
|
|
%jmp T_6;
|
|
.thread T_6;
|
|
.scope S_0000013b199e1d60;
|
|
T_7 ;
|
|
%fork t_7, S_0000013b199e0140;
|
|
%jmp t_6;
|
|
.scope S_0000013b199e0140;
|
|
t_7 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0000013b199e35a0_0, 0, 1;
|
|
%end;
|
|
.scope S_0000013b199e1d60;
|
|
t_6 %join;
|
|
%end;
|
|
.thread T_7;
|
|
.scope S_0000013b199e75c0;
|
|
T_8 ;
|
|
%wait E_0000013b19924920;
|
|
%load/vec4 v0000013b199e5790_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_8.0, 8;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0000013b199e5010_0, 0;
|
|
%jmp T_8.1;
|
|
T_8.0 ;
|
|
%load/vec4 v0000013b199e5d30_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_8.2, 8;
|
|
%load/vec4 v0000013b199e44d0_0;
|
|
%assign/vec4 v0000013b199e5010_0, 0;
|
|
T_8.2 ;
|
|
T_8.1 ;
|
|
%jmp T_8;
|
|
.thread T_8;
|
|
.scope S_0000013b199e0780;
|
|
T_9 ;
|
|
%fork t_9, S_0000013b199e6170;
|
|
%jmp t_8;
|
|
.scope S_0000013b199e6170;
|
|
t_9 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0000013b199e5010_0, 0, 1;
|
|
%end;
|
|
.scope S_0000013b199e0780;
|
|
t_8 %join;
|
|
%end;
|
|
.thread T_9;
|
|
.scope S_0000013b199e7110;
|
|
T_10 ;
|
|
%wait E_0000013b19925e60;
|
|
%load/vec4 v0000013b199e51f0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_10.0, 8;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0000013b199e4f70_0, 0;
|
|
%jmp T_10.1;
|
|
T_10.0 ;
|
|
%load/vec4 v0000013b199e5510_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_10.2, 8;
|
|
%load/vec4 v0000013b199e4110_0;
|
|
%assign/vec4 v0000013b199e4f70_0, 0;
|
|
T_10.2 ;
|
|
T_10.1 ;
|
|
%jmp T_10;
|
|
.thread T_10;
|
|
.scope S_0000013b199e6ad0;
|
|
T_11 ;
|
|
%fork t_11, S_0000013b199e6300;
|
|
%jmp t_10;
|
|
.scope S_0000013b199e6300;
|
|
t_11 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0000013b199e4f70_0, 0, 1;
|
|
%end;
|
|
.scope S_0000013b199e6ad0;
|
|
t_10 %join;
|
|
%end;
|
|
.thread T_11;
|
|
.scope S_0000013b199e7c00;
|
|
T_12 ;
|
|
%wait E_0000013b19925820;
|
|
%load/vec4 v0000013b199e4070_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_12.0, 8;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0000013b199e55b0_0, 0;
|
|
%jmp T_12.1;
|
|
T_12.0 ;
|
|
%load/vec4 v0000013b199e5a10_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_12.2, 8;
|
|
%load/vec4 v0000013b199e4930_0;
|
|
%assign/vec4 v0000013b199e55b0_0, 0;
|
|
T_12.2 ;
|
|
T_12.1 ;
|
|
%jmp T_12;
|
|
.thread T_12;
|
|
.scope S_0000013b199e6490;
|
|
T_13 ;
|
|
%fork t_13, S_0000013b199e5fe0;
|
|
%jmp t_12;
|
|
.scope S_0000013b199e5fe0;
|
|
t_13 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0000013b199e55b0_0, 0, 1;
|
|
%end;
|
|
.scope S_0000013b199e6490;
|
|
t_12 %join;
|
|
%end;
|
|
.thread T_13;
|
|
.scope S_0000013b199e6620;
|
|
T_14 ;
|
|
%wait E_0000013b19925a20;
|
|
%load/vec4 v0000013b199e4bb0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_14.0, 8;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0000013b199e5650_0, 0;
|
|
%jmp T_14.1;
|
|
T_14.0 ;
|
|
%load/vec4 v0000013b199e4a70_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_14.2, 8;
|
|
%load/vec4 v0000013b199e5b50_0;
|
|
%assign/vec4 v0000013b199e5650_0, 0;
|
|
T_14.2 ;
|
|
T_14.1 ;
|
|
%jmp T_14;
|
|
.thread T_14;
|
|
.scope S_0000013b199e7a70;
|
|
T_15 ;
|
|
%fork t_15, S_0000013b199e7750;
|
|
%jmp t_14;
|
|
.scope S_0000013b199e7750;
|
|
t_15 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0000013b199e5650_0, 0, 1;
|
|
%end;
|
|
.scope S_0000013b199e7a70;
|
|
t_14 %join;
|
|
%end;
|
|
.thread T_15;
|
|
.scope S_0000013b199e6df0;
|
|
T_16 ;
|
|
%wait E_0000013b19925620;
|
|
%load/vec4 v0000013b199e86d0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_16.0, 8;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0000013b199e98f0_0, 0;
|
|
%jmp T_16.1;
|
|
T_16.0 ;
|
|
%load/vec4 v0000013b199e8db0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_16.2, 8;
|
|
%load/vec4 v0000013b199e8810_0;
|
|
%assign/vec4 v0000013b199e98f0_0, 0;
|
|
T_16.2 ;
|
|
T_16.1 ;
|
|
%jmp T_16;
|
|
.thread T_16;
|
|
.scope S_0000013b199e6c60;
|
|
T_17 ;
|
|
%fork t_17, S_0000013b199e6f80;
|
|
%jmp t_16;
|
|
.scope S_0000013b199e6f80;
|
|
t_17 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0000013b199e98f0_0, 0, 1;
|
|
%end;
|
|
.scope S_0000013b199e6c60;
|
|
t_16 %join;
|
|
%end;
|
|
.thread T_17;
|
|
.scope S_0000013b1992eb90;
|
|
T_18 ;
|
|
%vpi_call 2 37 "$dumpfile", "EzLogic_tb.vcd" {0 0 0};
|
|
%vpi_call 2 38 "$dumpvars", 32'sb00000000000000000000000000000000, S_0000013b1992eb90 {0 0 0};
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0000013b199ebcd0_0, 0, 1;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0000013b199eab50_0, 0, 1;
|
|
%pushi/vec4 0, 0, 8;
|
|
%store/vec4 v0000013b199eb5f0_0, 0, 8;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0000013b199ea5b0_0, 0, 1;
|
|
%pushi/vec4 0, 0, 7;
|
|
%store/vec4 v0000013b199ebc30_0, 0, 7;
|
|
%pushi/vec4 0, 0, 7;
|
|
%store/vec4 v0000013b199eb050_0, 0, 7;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0000013b199eb190_0, 0, 1;
|
|
%pushi/vec4 0, 0, 336;
|
|
%store/vec4 v0000013b199ec590_0, 0, 336;
|
|
%delay 4000000, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%store/vec4 v0000013b199eab50_0, 0, 1;
|
|
%pushi/vec4 1, 0, 1;
|
|
%store/vec4 v0000013b199eb190_0, 0, 1;
|
|
%wait E_0000013b199237a0;
|
|
%delay 4000000, 0;
|
|
%load/vec4 v0000013b199ea0b0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_18.0, 8;
|
|
%vpi_call 2 53 "$display", "Great! You've found the correct flag!" {0 0 0};
|
|
%jmp T_18.1;
|
|
T_18.0 ;
|
|
%vpi_call 2 56 "$display", "Binary Data: %b", v0000013b199ec590_0 {0 0 0};
|
|
%vpi_call 2 57 "$display", "Binary Data: %b", v0000013b199ebb90_0 {0 0 0};
|
|
%vpi_call 2 58 "$display", "Hexadecimal Data: %h", v0000013b199ec590_0 {0 0 0};
|
|
%vpi_call 2 59 "$display", "Haha, try again!" {0 0 0};
|
|
T_18.1 ;
|
|
%delay 20000000, 0;
|
|
%vpi_call 2 62 "$finish" {0 0 0};
|
|
%end;
|
|
.thread T_18;
|
|
.scope S_0000013b1992eb90;
|
|
T_19 ;
|
|
%wait E_0000013b19923d20;
|
|
%load/vec4 v0000013b199eb190_0;
|
|
%pad/u 32;
|
|
%cmpi/e 1, 0, 32;
|
|
%jmp/0xz T_19.0, 4;
|
|
%load/vec4 v0000013b199ebc30_0;
|
|
%pad/u 32;
|
|
%cmpi/u 42, 0, 32;
|
|
%jmp/0xz T_19.2, 5;
|
|
%load/vec4 v0000013b199ebc30_0;
|
|
%addi 1, 0, 7;
|
|
%assign/vec4 v0000013b199ebc30_0, 0;
|
|
%ix/getv 4, v0000013b199ebc30_0;
|
|
%load/vec4a v0000013b199ea150, 4;
|
|
%assign/vec4 v0000013b199eb5f0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0000013b199ea5b0_0, 0;
|
|
%jmp T_19.3;
|
|
T_19.2 ;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0000013b199eb5f0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0000013b199ea5b0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0000013b199eb190_0, 0;
|
|
T_19.3 ;
|
|
T_19.0 ;
|
|
%jmp T_19;
|
|
.thread T_19;
|
|
.scope S_0000013b1992eb90;
|
|
T_20 ;
|
|
%wait E_0000013b19923d20;
|
|
%load/vec4 v0000013b199ec630_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_20.0, 8;
|
|
%load/vec4 v0000013b199eb050_0;
|
|
%addi 1, 0, 7;
|
|
%assign/vec4 v0000013b199eb050_0, 0;
|
|
%load/vec4 v0000013b199ea510_0;
|
|
%ix/load 5, 0, 0;
|
|
%pushi/vec4 328, 0, 34;
|
|
%load/vec4 v0000013b199eb050_0;
|
|
%pad/u 32;
|
|
%muli 8, 0, 32;
|
|
%pad/u 34;
|
|
%sub;
|
|
%ix/vec4/s 4;
|
|
%assign/vec4/off/d v0000013b199ec590_0, 4, 5;
|
|
T_20.0 ;
|
|
%jmp T_20;
|
|
.thread T_20;
|
|
.scope S_0000013b1992eb90;
|
|
T_21 ;
|
|
%delay 1000000, 0;
|
|
%load/vec4 v0000013b199ebcd0_0;
|
|
%inv;
|
|
%store/vec4 v0000013b199ebcd0_0, 0, 1;
|
|
%jmp T_21;
|
|
.thread T_21;
|
|
# The file index is used to find the file name in the following table.
|
|
:file_names 13;
|
|
"N/A";
|
|
"<interactive>";
|
|
"./problem/EzLogic_tb.v";
|
|
"./problem/EzLogic_top_synth.v";
|
|
"./behavioral models/GND.v";
|
|
"./behavioral models/VCC.v";
|
|
"./behavioral models/BUFG.v";
|
|
"./behavioral models/IBUF.v";
|
|
"./behavioral models/OBUF.v";
|
|
"./behavioral models/LUT2.v";
|
|
"./behavioral models/LUT1.v";
|
|
"./behavioral models/FDCE.v";
|
|
"./behavioral models/CARRY4.v";
|